diff --git a/cMIPS/tests/handlerUART.s b/cMIPS/tests/handlerUART.s
index 58e2dff6088ca9141c055458f267412d8729753b..27ecb4e39bb8a9f8639ac00906ebb59717b50922 100644
--- a/cMIPS/tests/handlerUART.s
+++ b/cMIPS/tests/handlerUART.s
@@ -4,10 +4,63 @@
     #           [4]=$ra, [5]=$a0, [6]=$a1, [7]=$a2, [8]=$a3
     #k0 = _uart_buff
 
+    # saving used registers on _uart_buff
+    
+    sw    $a2, 7*4($k0)
+    sw    $a3, 8*4($k0)
+    sw    $v0, 9*4($k0)
+
+    jal disableInterr
+    nop
+
     andi  $a1, $k1, UART_rx_irq # Is this reception?
-    beq   $a1, $zero, UARTret   #   no, maybe transmission?
+    beq   $a1, $zero, UARTrxinter #   no, maybe transmission?
+    nop
+    andi  $a1, $k1, UART_tx_irq # Is this reception?
+    bne   $a1, $zero, UARTret     #   no, maybe transmission?
+    nop
+
+    lui   $a2, %hi(ntx)
+    ori   $a2, $a2, %lo(ntx)
+    lw    $a1, 0($a2)
+
+    li    $a3, 16
+    beq   $a3, $a1, overrun     # empty Q
     nop
 
+    addi  $a1, $a1, 1
+    sw    $a1, 0($a2)           # update ntx, one more free space
+
+    lui   $a2, %hi(tx_q)
+    ori   $a2, $a2, %lo(tx_q)
+    
+    lui   $a1, %hi(tx_hd)
+    ori   $a1, $a1, %lo(tx_hd)
+    lw    $a3, 0($a1)
+    addi  $a3, $a3, 1
+    andi  $a3, $a3, 0xf         # modulo 16
+    sw    $a3, 0(a1)            # store new head index
+
+    add   $a2, $a2, $a3
+    lb    $a3, 0($a2)           # get char from Q head
+
+    sw    $a2, 0(a0)            # write char in txreg
+
+overrun:
+
+    # do something if rx queue is full or tx is empty
+    #... (doing absolutely nothing besides stacking and unstacking regs)
+
+    #Precisa coisar o nrx (incrementar)
+    jal   enableInterr
+    nop
+    lw    $v0, 9*4($k0)                                                         
+    lw    $a3, 8*4($k0)                                                         
+    lw    $a2, 7*4($k0)                                                         
+    b     UARTret
+    nop
+
+UARTrxinter:
     #handle reception
     lw    $a1, 4($a0)           # Read data from device
     nop                         #   and store it to UART's buffer
@@ -16,11 +69,6 @@
     sw    $a1, 3*4($k0)         # Signal new arrival
                                 # Jedian: when a new char is on the UART's buffer, 
                                 #         i have to enqueue it and update nrx.
-
-    # saving used registers on _uart_buff
-    sw    $5, 9*4($k0)
-    sw    $6, 10*4($k0)
-    sw    $7, 11*4($k0)
     
     # check if queue is full, maybe increment
     lui   $5, %hi(nrx)
@@ -51,22 +99,13 @@
     nop
     sb    $7, 0($6)             # and store it!
 
+    jal   enableInterr
+    nop
+
     #### process rx_tl -- update tail
     #lw   $7, 0($5)
     #nop
 
-overrun:
-
-    # do something if queue is full
-    #... (doing absolutely nothing besides stacking and unstacking regs)
-
-    # loading back used registers
-    lw    $5, 9*4($k0)
-    lw    $6, 10*4($k0)
-    lw    $7, 11*4($k0)
-
-    #Precisa coisar o nrx (incrementar)
-
 #UARTinterr2:
 #    andi  $a1, $k1, UART_tx_irq # Is this transmission?
 #    beq   $a1, $zero, UARTret   # no, ignore it and return
diff --git a/cMIPS/tests/handlerUARTjedi.s b/cMIPS/tests/handlerUARTjedi.s
deleted file mode 100644
index 2c9b6890757e4da8c8be6f742828d44534f078d5..0000000000000000000000000000000000000000
--- a/cMIPS/tests/handlerUARTjedi.s
+++ /dev/null
@@ -1,66 +0,0 @@
-#UARTinterr:
-    # There is space on _uart_buff
-    # _uart_buff[0]=UARTstatus, [1]=UARTcontrol, [2]=data_inp, [3]=new,
-    #           [4]=$ra, [5]=$a0, [6]=$a1, [7]=$a2, [8]=$a3
-    #k0 = _uart_buff
-
-    andi  $a1, $k1, UART_rx_irq # Is this reception?
-    beq   $a1, $zero, UARTret   #   no, maybe transmission?
-    nop
-
-    #handle reception
-    lw    $a1, 4($a0)           # Read data from device
-    nop                         #   and store it to UART's buffer
-    sw    $a1, 2*4($k0)         #   and return from interrupt
-    addiu $a1, $zero, 1
-    sw    $a1, 3*4($k0)         # Signal new arrival
-                                # Jedian: when a new char is on the UART's buffer, 
-                                #         i have to enqueue it and update nrx.
-
-    #ACHO QUE ELE NAO TA RESETANDO O INTERRUPTION REQUEST, AI FICA TRAVADAO
-    # saving used registers on _uart_buff
-    sw    $5, 9*4($k0)
-    sw    $6, 10*4($k0)
-    sw    $7, 11*4($k0)
-    
-    # enqueue
-    lui   $5, %hi(rx_hd)        # get rx head address
-    ori   $5, $5, %lo(rx_hd)    
-
-    lw    $7, 0($5)
-
-    #### stores on queue on head
-    lui   $6, %hi(rx_q)         # get queue address
-    ori   $6, $6, %lo(rx_q)
-
-    sll   $7, $7, 2             # multiply by 4
-    addu  $6, $7, $6            # calculate address to move new char
-    lw    $7, 2*4($k0)          # get char to be stored
-    nop
-    sw    $7, 0($6)             # and store it!
-
-    #### process rx_hd -- updates head
-    lw    $7, 0($5)
-    nop
-    addiu $7, $7, 1             # increment in 1 the head of the circular queue
-    andi  $7, $7, 0xf           # % 16
-    sw    $7, 0($5)
-
-#FIZ TUDO ERRADO, ERA NO TAIL QUE EU TINHA QUE MUDAR, EXEMPLO NA APOSTILA PAG 142
-
-    # loading back used registers
-    lw    $5, 9*4($k0)
-    lw    $6, 10*4($k0)
-    lw    $7, 11*4($k0)
-
-#UARTinterr2:
-#    andi  $a1, $k1, UART_tx_irq # Is this transmission?
-#    beq   $a1, $zero, UARTret   # no, ignore it and return
-#    nop
-
-    #handle transmission
-    # ... TODO
-
-    # Lembrar de inicializar os hd e tl com 0 no comeco do main
-
-#UARTret: