From 708410d2fdb0b0c828866c41d6ba384ac75a3d68 Mon Sep 17 00:00:00 2001
From: Jedian <jmb15@c3sl.ufpr.br>
Date: Mon, 30 May 2016 17:40:06 -0300
Subject: [PATCH] Talvez rx esteja pronto
Signed-off-by: Jedian <jmb15@c3sl.ufpr.br>
---
cMIPS/tests/handlerUARTjedi2.s | 17 ++++++++++++++++-
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/cMIPS/tests/handlerUARTjedi2.s b/cMIPS/tests/handlerUARTjedi2.s
index ec4f00b..31644ba 100644
--- a/cMIPS/tests/handlerUARTjedi2.s
+++ b/cMIPS/tests/handlerUARTjedi2.s
@@ -22,6 +22,16 @@
sw $6, 10*4($k0)
sw $7, 11*4($k0)
+ # check if queue is full, maybe increment
+ lui $5, %hi(nrx)
+ ori $5, $5, %lo(nrx)
+ lw $7, 0($5)
+ slti $6, $7, 16
+ beq $6, zero, overrun
+ nop
+ addiu $7, $7, 1
+ sw $7, 0($5)
+
# enqueue
lui $5, %hi(rx_tl) # get rx tail address
ori $5, $5, %lo(rx_tl)
@@ -42,9 +52,14 @@
sb $7, 0($6) # and store it!
#### process rx_tl -- update tail
- #lw $7, 0($5)
+ #lw $7, 0($5)
#nop
+overrun:
+
+ # do something if queue is full
+ #... (doing absolutely nothing besides stacking and unstacking regs)
+
# loading back used registers
lw $5, 9*4($k0)
lw $6, 10*4($k0)
--
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