diff --git a/cMIPS/include/mainjedi.c b/cMIPS/include/mainjedi.c
new file mode 100644
index 0000000000000000000000000000000000000000..668d307d184dffd0ab1164f5d718f40cc1ddaa01
--- /dev/null
+++ b/cMIPS/include/mainjedi.c
@@ -0,0 +1,83 @@
+#include "cMIPS.h"
+
+typedef struct control { // control register fields (uses only ls byte)
+  int ign   : 24,        // ignore uppermost bits
+    rts     : 1,         // Request to Send output (bit 7)
+    ign2    : 2,         // bits 6,5 ignored
+    intTX   : 1,         // interrupt on TX buffer empty (bit 4)
+    intRX   : 1,         // interrupt on RX buffer full (bit 3)
+    speed   : 3;         // 4,8,16..256 tx-rx clock data rates  (bits 0..2)
+} Tcontrol;
+
+typedef struct status { // status register fields (uses only ls byte)
+  int ign : 24,       // ignore uppermost bits
+  ign7    : 1,        // ignored (bit 7)
+  txEmpty : 1,        // TX register is empty (bit 6)
+  rxFull  : 1,        // octet available from RX register (bit 5)
+  int_TX_empt: 1,     // interrupt pending on TX empty (bit 4)
+  int_RX_full: 1,     // interrupt pending on RX full (bit 3)
+  ign2    : 1,        // ignored (bit 2)
+  framing : 1,        // framing error (bit 1)
+  overun  : 1;        // overun error (bit 0)
+} Tstatus;
+
+
+typedef union ctlStat { // control + status on same address
+  Tcontrol  ctl;        // write-only
+  Tstatus   stat;       // read-only
+} TctlStat;
+
+typedef union data {    // data registers on same address
+  int tx;               // write-only
+  int rx;               // read-only
+} Tdata;
+
+typedef struct serial {
+  TctlStat cs;          // @ (int *)IO_UART_ADDR
+}
+
+typedef struct serial {
+  TctlStat cs;          // @ (int *)IO_UART_ADDR
+  Tdata    d;           // @ (int *)(IO_UART_ADDR+1)
+} Tserial;
+
+
+extern int _uart_buff[16]; // declared in include/handlers.s
+
+int main(void) { // receive a string through the UART serial interface
+  volatile Tserial *uart;  // tell GCC not to optimize away code
+  Tcontrol ctrl;
+  volatile int *bfr = &(_uart_buff[0]);
+  volatile char c;
+
+  uart = (void *)IO_UART_ADDR; // bottom of UART address range
+
+  ctrl.ign   = 0;
+  ctrl.rts   = 0;  // make RTS=0 to hold remote unit
+  ctrl.intTX = 0;
+  ctrl.intRX = 0;
+  ctrl.speed = 2;  // operate at 1/4 of the highest data rate
+  uart->cs.ctl = ctrl; // initizlize UART
+
+  // handler sets flag=bfr[3] to 1 after new character is received;
+  // this program resets the flag on fetching a new character from buffer
+  bfr[3] = 0;      //   reset flag  
+
+  ctrl.ign   = 0;
+  ctrl.rts   = 1;  // make RTS=1 so RemoteUnit starts its transmission
+  ctrl.intTX = 0;
+  ctrl.intRX = 1;  // do generate interrupts on RXbuffer full
+  ctrl.speed = 2;  // operate at 1/4 of the highest data rate
+  uart->cs.ctl = ctrl;
+
+  do {
+    while ( (c = (char)bfr[3]) == 0 )
+      {};                 // nothing new
+    c = (char)bfr[2];     // get new character
+    bfr[3] = 0;           //   and reset flag
+    to_stdout( (int)c );
+  } while (c != '\0');    // end of string?
+
+  return c;
+
+}
diff --git a/cMIPS/tests/handlerUARTjedi.s b/cMIPS/tests/handlerUARTjedi.s
new file mode 100644
index 0000000000000000000000000000000000000000..4336d2190c11a06b547766f70951b987891da5e2
--- /dev/null
+++ b/cMIPS/tests/handlerUARTjedi.s
@@ -0,0 +1,23 @@
+#UARTinterr:
+    andi  $a1, $k1, UART_rx_irq # Is this reception?
+    beq   $a1, $zero, UARTinterr2   #   no, maybe transmission?
+    nop
+
+    #handle reception
+    lw    $a1, 4($a0)           # Read data from device
+    nop                         #   and store it to UART's buffer
+    sw    $a1, 2*4($k0)         #   and return from interrupt
+    addiu $a1, $zero, 1
+    sw    $a1, 3*4($k0)         # Signal new arrival
+                                # Jedian: when a new char is on the UART's buffer, i have to enqueue it and update nrx
+
+UARTinterr2:
+    andi  $a1, $k1, UART_tx_irq # Is this transmission?
+    beq   $a1, $zero, UARTret   # no, ignore it and return
+    nop
+
+    #handle transmission
+    # ... TODO
+
+
+#UARTret: