From d842fa2a5fc2b3c64b13ddce31af6d8f2cfc48b5 Mon Sep 17 00:00:00 2001
From: Strozzi <laps15@inf.ufpr.br>
Date: Tue, 7 Jun 2016 09:06:28 -0300
Subject: [PATCH] finish tranmission tests
---
cMIPS/tests/data.bin | Bin 0 -> 66176 bytes
cMIPS/tests/handlerUART.s | 34 +--
cMIPS/tests/mainTrans.c | 149 ++++++++++++
cMIPS/tests/mainTrans.elf | Bin 0 -> 23424 bytes
cMIPS/tests/mainTrans.map | 173 ++++++++++++++
cMIPS/tests/mainTrans.o | Bin 0 -> 3032 bytes
cMIPS/tests/mainTrans.s | 474 ++++++++++++++++++++++++++++++++++++++
cMIPS/tests/prog.bin | Bin 80 -> 4144 bytes
8 files changed, 814 insertions(+), 16 deletions(-)
create mode 100644 cMIPS/tests/mainTrans.c
create mode 100755 cMIPS/tests/mainTrans.elf
create mode 100644 cMIPS/tests/mainTrans.map
create mode 100644 cMIPS/tests/mainTrans.o
create mode 100644 cMIPS/tests/mainTrans.s
diff --git a/cMIPS/tests/data.bin b/cMIPS/tests/data.bin
index e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..361f7170d993098fc6007255f1bddd4666d1671e 100644
GIT binary patch
literal 66176
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H97+QKWvy8m
literal 0
HcmV?d00001
diff --git a/cMIPS/tests/handlerUART.s b/cMIPS/tests/handlerUART.s
index d92eaf5..77e018e 100644
--- a/cMIPS/tests/handlerUART.s
+++ b/cMIPS/tests/handlerUART.s
@@ -9,50 +9,52 @@
sw $a2, 7*4($k0)
sw $a3, 8*4($k0)
sw $v0, 9*4($k0)
-
- jal disableInterr #$v0 = status
- nop
+ sw $ra, 10*4($k0)
andi $a1, $k1, UART_rx_irq # Is this reception?
- beq $a1, $zero, UARTrxinter # no, maybe transmission?
+ bne $a1, $zero, UARTrxinter # no, maybe transmission?
nop
andi $a1, $k1, UART_tx_irq # Is this transmission?
- bne $a1, $zero, UARTret # no, it was nothing
+ beq $a1, $zero, UARTret # no, it was nothing
nop
lui $a2, %hi(ntx)
ori $a2, $a2, %lo(ntx)
lw $a1, 0($a2)
+# jal print
+# move $a0, $a1
+
+# lui $a0, %hi(HW_uart_addr)# get device's addres
+# ori $a0, $a0, %lo(HW_uart_addr)
+
li $a3, 16
- beq $a3, $a1, overrun # empty Q
+ beq $a3, $a1, endUH # empty Q
nop
addi $a1, $a1, 1
sw $a1, 0($a2) # update ntx, one more free space
- # STORE AND THEN INCREMENTS
+ # INCREMENTS AND THEN LOAD
lui $a2, %hi(tx_q)
ori $a2, $a2, %lo(tx_q)
-
lui $a1, %hi(tx_hd)
ori $a1, $a1, %lo(tx_hd)
lw $a3, 0($a1)
nop
+ addi $a3, $a3, 1 #increment Q head
+ andi $a3, $a3, 0xf # modulo 16
+ sw $a3, 0($a1) # store new head index
add $a2, $a2, $a3 # a2 <- &(tx_q[tx_hd])
lb $a3, 0($a2) # get char from Q head
nop
- addi $a3, $a3, 1 #increment Q head
- andi $a3, $a3, 0xf # modulo 16
- sw $a3, 0(a1) # store new head index
- sw $a2, 0(a0) # write char in txreg
+ sw $a3, 1*4($a0) # write char in txreg
-endHU:
+endUH:
- jal enableInterr
- nop
+ lw $ra, 10*4($k0)
lw $v0, 9*4($k0)
lw $a3, 8*4($k0)
b UARTret
@@ -107,7 +109,7 @@ overrun:
#... (doing absolutely nothing besides stacking and unstacking regs)
lw $a1, 0*4($k0) # get status from memory
nop
- andi $a1, $a1, 0xFFFFFFF1 # set overun bit to 1
+ ori $a1, $a1, 0x00000001 # set overun bit to 1
# sw $a1, ??? ---+ Dunno where to save Status
b endUH # |
nop # <--+
diff --git a/cMIPS/tests/mainTrans.c b/cMIPS/tests/mainTrans.c
new file mode 100644
index 0000000..1f3b0aa
--- /dev/null
+++ b/cMIPS/tests/mainTrans.c
@@ -0,0 +1,149 @@
+#include "cMIPS.h"
+#include "../include/vetorFib.h"
+#include "../include/structUart.h"
+
+#define OBOUND_MESG "Out of bounds\n"
+#define OVERUN_MESG "Overun\n"
+#define MAXPOW 7
+#define SPEED 1
+#define COUNT ((SPEED+1)*100)
+
+// ----------------------- begin driver?
+extern UARTdriver Ud;
+volatile Tserial *uart;
+#if 0
+int proberx () {
+ return Ud.nrx;
+}
+
+int probetx () {
+ return Ud.ntx;
+}
+
+void ioctl (int c) {
+ uart->cs.ctl = (Tcontrol)c;
+}
+
+int iostat() {
+ return (int)uart->cs.stat;
+}
+#endif
+int Putc (char c) {
+ int ntx = Ud.ntx;
+ if (ntx == 0)
+ return 0;
+ if (ntx == 16 && uart->cs.stat.txEmpty) // Empty Q && Tx
+ uart->d.tx = (unsigned int) c; // 32-bits
+ else { // Sending smthng
+ disableInterr();
+ Ud.ntx--;
+ // INCREMENTS AND THEN STORE
+ Ud.tx_tl = (Ud.tx_tl+1)&0xF; // modulo 16
+ Ud.tx_q[Ud.tx_tl] = c;
+ enableInterr();
+ }
+ return 1;
+}
+// ------------------------- end driver?
+// ------------------------- begin main()
+int Strlen (char *c) {
+ int i= 0;
+ while(c[i++]-10);
+ return i-1;
+}
+
+int pow16 (int ex) {
+ int i, ret=1;
+ for (i= 0; i< ex/2; i++)
+ ret*=16;
+ ret *= ret;
+ return (ex%2?ret*16:ret);
+}
+
+int hex2int (char *hex) {
+ int s= Strlen(hex), i, ans= 0;
+ #if 0
+ Test Signal...
+ switch (hex[0]) {
+ case 'F':
+ case 'f':
+ case 'E':
+ case 'e':
+ case 'D':
+ case 'd':
+ case 'C':
+ case 'c':
+ case 'B':
+ case 'b':
+ case 'A':
+ case 'a':
+ case '9':
+ ans = hex[0]*pow16(s-1);
+ }
+ #endif
+ for (i= 0; i< s; i++) {
+ hex[i]-= 48;
+ if (hex[i] > 9)
+ hex[i] -= 7;
+ if (hex[i] > 15)
+ hex[i] -= 32;
+ ans += hex[i] * pow16(s-(i+1));
+ }
+ return ans;
+}
+
+int int2hex (char *c, int i) {
+ int j= 0, val;
+ int p;
+ p = pow16(MAXPOW);
+ while (p > 0) {
+ val= 0;
+ if (i/p) {
+ val= i/p;
+ i%= p;
+ }
+ if ((val < 10) && (j || val)) { // impede que '0' sejam escritos à esquerda
+ c[j++] = val+'0';
+ }
+ else if (val > 9)
+ c[j++] = 'a'+ (val-10);
+ p/=16;
+ }
+ c[j] = 10;
+ return j-1;
+}
+
+int main () {
+ Tcontrol ctrl;
+ char p[15];
+ int fib, j, s, val, rx, sent;
+ volatile int *counter;
+
+ counter = (int *)IO_COUNT_ADDR;
+ uart= (void *)IO_UART_ADDR;
+ // initialize UART control
+ ctrl.rts= 0;
+ ctrl.intTX= 1; // Both interruption
+ ctrl.intRX= 0;
+ ctrl.speed= SPEED;
+ uart->cs.ctl = ctrl;
+
+ Ud.ntx = 16;
+ for (fib= 0; fib< 44; fib++) {
+ int2hex(p, buf[fib]);
+ j= -1;
+ do {
+ j++;
+ while (((rx = Ud.nrx) != 16) && (!Putc(p[j])));
+ if (rx == 16) {
+ // Empty it
+ j--;
+ }
+ } while (p[j] != 0);
+ }
+
+ startCounter (COUNT , 0);
+ while ((val= (readCounter() && 0x3FFFFFFF)) < COUNT);
+
+ return val;
+}
diff --git a/cMIPS/tests/mainTrans.elf b/cMIPS/tests/mainTrans.elf
new file mode 100755
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literal 0
HcmV?d00001
diff --git a/cMIPS/tests/mainTrans.map b/cMIPS/tests/mainTrans.map
new file mode 100644
index 0000000..ecfd517
--- /dev/null
+++ b/cMIPS/tests/mainTrans.map
@@ -0,0 +1,173 @@
+
+Allocating common symbols
+Common symbol size file
+
+_excp_saves 0x40 /home/bcc/laps15/nobackup/TrabRob/cmips/cMIPS/include/start.o
+uart 0x4 mainTrans.o
+
+Discarded input sections
+
+ .reginfo 0x0000000000000000 0x18 /home/bcc/laps15/nobackup/TrabRob/cmips/cMIPS/include/handlers.o
+ .MIPS.abiflags
+ 0x0000000000000000 0x18 /home/bcc/laps15/nobackup/TrabRob/cmips/cMIPS/include/handlers.o
+ .reginfo 0x0000000000000000 0x18 /home/bcc/laps15/nobackup/TrabRob/cmips/cMIPS/include/cMIPSio.o
+ .MIPS.abiflags
+ 0x0000000000000000 0x18 /home/bcc/laps15/nobackup/TrabRob/cmips/cMIPS/include/cMIPSio.o
+ .reginfo 0x0000000000000000 0x18 mainTrans.o
+ .MIPS.abiflags
+ 0x0000000000000000 0x18 mainTrans.o
+
+Memory Configuration
+
+Name Origin Length Attributes
+rom 0x0000000000000000 0x0000000000004000 xr
+ram 0x0000000000040000 0x0000000000020000 !xr
+sdram 0x0000000004000000 0x0000000002000000 !xr
+io 0x000000003c000000 0x0000000000020000 !xr
+*default* 0x0000000000000000 0xffffffffffffffff
+
+Linker script and memory map
+
+
+.text 0x0000000000000000 0x1030
+ *(.text .text.*)
+ .text 0x0000000000000000 0x524 /home/bcc/laps15/nobackup/TrabRob/cmips/cMIPS/include/start.o
+ 0x0000000000000000 _start
+ 0x00000000000000f4 exit
+ 0x00000000000000f4 _exit
+ 0x0000000000000130 _excp_0000
+ 0x0000000000000200 _excp_0100
+ 0x0000000000000280 _excp_0180
+ 0x0000000000000334 _excp_0180ret
+ 0x0000000000000400 _excp_0200
+ 0x00000000000004e0 _excp_BFC0
+ 0x0000000000000500 PT_update
+ .text 0x0000000000000524 0x464 /home/bcc/laps15/nobackup/TrabRob/cmips/cMIPS/include/handlers.o
+ 0x0000000000000524 extCounter
+ 0x0000000000000564 UARTinterr
+ 0x00000000000006b8 countCompare
+ 0x00000000000006d4 enableInterr
+ 0x00000000000006ec disableInterr
+ 0x0000000000000708 handle_Mod
+ 0x0000000000000808 handle_TLBL
+ 0x00000000000008bc TLB_purge
+ 0x0000000000000920 cmips_delay
+ 0x0000000000000938 cmips_kmsg
+ .text 0x0000000000000988 0x2e8 /home/bcc/laps15/nobackup/TrabRob/cmips/cMIPS/include/cMIPSio.o
+ 0x0000000000000988 from_stdin
+ 0x0000000000000998 to_stdout
+ 0x00000000000009a8 print
+ 0x00000000000009b4 readInt
+ 0x00000000000009dc writeInt
+ 0x00000000000009e8 writeClose
+ 0x00000000000009f8 dumpRAM
+ 0x0000000000000a08 readStats
+ 0x0000000000000a10 memcpy
+ 0x0000000000000b38 memset
+ 0x0000000000000c14 startCounter
+ 0x0000000000000c44 stopCounter
+ 0x0000000000000c60 readCounter
+ .text 0x0000000000000c70 0x3c0 mainTrans.o
+ 0x0000000000000c70 Putc
+ 0x0000000000000d28 Strlen
+ 0x0000000000000d54 pow16
+ 0x0000000000000da8 hex2int
+ 0x0000000000000e7c int2hex
+ 0x0000000000000f4c main
+ 0x0000000000001030 _etext = .
+
+.data 0x0000000000040000 0x148
+ 0x0000000000040000 _bdata = .
+ *(.data .data.*)
+ .data 0x0000000000040000 0x0 /home/bcc/laps15/nobackup/TrabRob/cmips/cMIPS/include/start.o
+ .data 0x0000000000040000 0x94 /home/bcc/laps15/nobackup/TrabRob/cmips/cMIPS/include/handlers.o
+ 0x0000000000040080 _kmsg_list
+ .data 0x0000000000040094 0x0 /home/bcc/laps15/nobackup/TrabRob/cmips/cMIPS/include/cMIPSio.o
+ .data 0x0000000000040094 0xb4 mainTrans.o
+ 0x0000000000040094 buf
+ 0x0000000000040148 _edata = .
+
+.data1
+ *(.data1)
+
+.rodata
+ *(.rodata .rodata.*)
+
+.MIPS.abiflags 0x0000000000040148 0x18
+ .MIPS.abiflags
+ 0x0000000000040148 0x18 /home/bcc/laps15/nobackup/TrabRob/cmips/cMIPS/include/start.o
+
+.rodata1
+ *(.rodata1)
+
+.lit8
+ *(.lit8)
+
+.lit4
+ *(.lit4)
+
+.sdata
+ *(.sdata .sdata.*)
+
+.sbss 0x0000000000040160 0x4
+ *(.sbss .sbss.*)
+ *(.scommon .scommon.*)
+ .scommon 0x0000000000040160 0x4 mainTrans.o
+ 0x0000000000040160 uart
+
+.bss 0x0000000000040170 0xf0
+ *(.bss .bss.*)
+ .bss 0x0000000000040170 0x0 /home/bcc/laps15/nobackup/TrabRob/cmips/cMIPS/include/start.o
+ .bss 0x0000000000040170 0xac /home/bcc/laps15/nobackup/TrabRob/cmips/cMIPS/include/handlers.o
+ 0x0000000000040170 _counter_val
+ 0x0000000000040194 Ud
+ 0x00000000000401cc _uart_buff
+ .bss 0x000000000004021c 0x0 /home/bcc/laps15/nobackup/TrabRob/cmips/cMIPS/include/cMIPSio.o
+ .bss 0x000000000004021c 0x0 mainTrans.o
+ *(COMMON)
+ *fill* 0x000000000004021c 0x4
+ COMMON 0x0000000000040220 0x40 /home/bcc/laps15/nobackup/TrabRob/cmips/cMIPS/include/start.o
+ 0x0000000000040220 _excp_saves
+ 0x0000000000040260 _end = .
+ 0x0000000000020000 end_RAM = 0x20000
+ 0x0000000000010000 half_RAM = (end_RAM / 0x2)
+ 0x0000000000050000 base_PT = (_bdata + half_RAM)
+
+.PT 0x0000000000050000 0x280
+ *(.PT)
+ .PT 0x0000000000050000 0x280 /home/bcc/laps15/nobackup/TrabRob/cmips/cMIPS/include/start.o
+ 0x0000000000050000 _PT
+LOAD /home/bcc/laps15/nobackup/TrabRob/cmips/cMIPS/include/start.o
+LOAD /home/bcc/laps15/nobackup/TrabRob/cmips/cMIPS/include/handlers.o
+LOAD /home/bcc/laps15/nobackup/TrabRob/cmips/cMIPS/include/cMIPSio.o
+LOAD mainTrans.o
+OUTPUT(mainTrans.elf elf32-littlemips)
+
+.reginfo 0x0000000000000000 0x18
+ .reginfo 0x0000000000000000 0x18 /home/bcc/laps15/nobackup/TrabRob/cmips/cMIPS/include/start.o
+
+.pdr 0x0000000000000000 0x480
+ .pdr 0x0000000000000000 0xe0 /home/bcc/laps15/nobackup/TrabRob/cmips/cMIPS/include/start.o
+ .pdr 0x00000000000000e0 0x140 /home/bcc/laps15/nobackup/TrabRob/cmips/cMIPS/include/handlers.o
+ .pdr 0x0000000000000220 0x1a0 /home/bcc/laps15/nobackup/TrabRob/cmips/cMIPS/include/cMIPSio.o
+ .pdr 0x00000000000003c0 0xc0 mainTrans.o
+
+.gnu.attributes
+ 0x0000000000000000 0x10
+ .gnu.attributes
+ 0x0000000000000000 0x10 /home/bcc/laps15/nobackup/TrabRob/cmips/cMIPS/include/start.o
+ .gnu.attributes
+ 0x0000000000000010 0x10 /home/bcc/laps15/nobackup/TrabRob/cmips/cMIPS/include/handlers.o
+ .gnu.attributes
+ 0x0000000000000020 0x10 /home/bcc/laps15/nobackup/TrabRob/cmips/cMIPS/include/cMIPSio.o
+ .gnu.attributes
+ 0x0000000000000030 0x10 mainTrans.o
+
+.mdebug.abi32 0x0000000000000000 0x0
+ .mdebug.abi32 0x0000000000000000 0x0 /home/bcc/laps15/nobackup/TrabRob/cmips/cMIPS/include/cMIPSio.o
+ .mdebug.abi32 0x0000000000000000 0x0 mainTrans.o
+
+.comment 0x0000000000000000 0x11
+ .comment 0x0000000000000000 0x11 /home/bcc/laps15/nobackup/TrabRob/cmips/cMIPS/include/cMIPSio.o
+ 0x12 (size before relaxing)
+ .comment 0x0000000000000011 0x12 mainTrans.o
diff --git a/cMIPS/tests/mainTrans.o b/cMIPS/tests/mainTrans.o
new file mode 100644
index 0000000000000000000000000000000000000000..7b0f84a19d6b095e28ed48af6e11de6010057046
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literal 0
HcmV?d00001
diff --git a/cMIPS/tests/mainTrans.s b/cMIPS/tests/mainTrans.s
new file mode 100644
index 0000000..3cc53c6
--- /dev/null
+++ b/cMIPS/tests/mainTrans.s
@@ -0,0 +1,474 @@
+ .file 1 "mainTrans.c"
+ .section .mdebug.abi32
+ .previous
+ .nan legacy
+ .module fp=32
+ .module nooddspreg
+ .text
+ .align 2
+ .globl Putc
+ .set nomips16
+ .set nomicromips
+ .ent Putc
+ .type Putc, @function
+Putc:
+ .frame $sp,24,$31 # vars= 0, regs= 2/0, args= 16, gp= 0
+ .mask 0x80010000,-4
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+ lui $2,%hi(Ud+52)
+ lw $2,%lo(Ud+52)($2)
+ nop
+ beq $2,$0,$L4
+ li $3,16 # 0x10
+
+ addiu $sp,$sp,-24
+ sw $31,20($sp)
+ sw $16,16($sp)
+ sll $16,$4,24
+ bne $2,$3,$L3
+ sra $16,$16,24
+
+ lui $2,%hi(uart)
+ lw $3,%lo(uart)($2)
+ nop
+ lw $2,0($3)
+ nop
+ sll $2,$2,25
+ bgez $2,$L3
+ nop
+
+ sw $16,4($3)
+ b $L2
+ li $2,1 # 0x1
+
+$L3:
+ jal disableInterr
+ nop
+
+ lui $2,%hi(Ud)
+ addiu $4,$2,%lo(Ud)
+ lw $2,52($4)
+ nop
+ addiu $2,$2,-1
+ sw $2,52($4)
+ lw $3,28($4)
+ nop
+ addiu $3,$3,1
+ andi $2,$3,0xf
+ sw $2,28($4)
+ addu $2,$2,$4
+ jal enableInterr
+ sb $16,32($2)
+
+ b $L2
+ li $2,1 # 0x1
+
+$L4:
+ j $31
+ move $2,$0
+
+$L2:
+ lw $31,20($sp)
+ lw $16,16($sp)
+ j $31
+ addiu $sp,$sp,24
+
+ .set macro
+ .set reorder
+ .end Putc
+ .size Putc, .-Putc
+ .align 2
+ .globl Strlen
+ .set nomips16
+ .set nomicromips
+ .ent Strlen
+ .type Strlen, @function
+Strlen:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+ move $2,$0
+ b $L8
+ li $6,10 # 0xa
+
+$L9:
+ move $2,$5
+$L8:
+ addiu $4,$4,1
+ lb $3,-1($4)
+ nop
+ bne $3,$6,$L9
+ addiu $5,$2,1
+
+ j $31
+ nop
+
+ .set macro
+ .set reorder
+ .end Strlen
+ .size Strlen, .-Strlen
+ .align 2
+ .globl pow16
+ .set nomips16
+ .set nomicromips
+ .ent pow16
+ .type pow16, @function
+pow16:
+ .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+ srl $5,$4,31
+ addu $5,$5,$4
+ sra $5,$5,1
+ blez $5,$L14
+ li $2,1 # 0x1
+
+ move $3,$0
+$L12:
+ addiu $3,$3,1
+ bne $3,$5,$L12
+ sll $2,$2,4
+
+ b $L17
+ mult $2,$2
+
+$L14:
+ mult $2,$2
+$L17:
+ andi $4,$4,0x1
+ beq $4,$0,$L15
+ nop
+
+ mflo $2
+ j $31
+ sll $2,$2,4
+
+$L15:
+ mflo $2
+ j $31
+ nop
+
+ .set macro
+ .set reorder
+ .end pow16
+ .size pow16, .-pow16
+ .align 2
+ .globl hex2int
+ .set nomips16
+ .set nomicromips
+ .ent hex2int
+ .type hex2int, @function
+hex2int:
+ .frame $sp,40,$31 # vars= 0, regs= 6/0, args= 16, gp= 0
+ .mask 0x801f0000,-4
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+ addiu $sp,$sp,-40
+ sw $31,36($sp)
+ sw $20,32($sp)
+ sw $19,28($sp)
+ sw $18,24($sp)
+ sw $17,20($sp)
+ sw $16,16($sp)
+ jal Strlen
+ move $16,$4
+
+ blez $2,$L24
+ addiu $17,$2,-1
+
+ move $19,$0
+ li $20,-1 # 0xffffffffffffffff
+$L23:
+ lbu $2,0($16)
+ nop
+ addiu $3,$2,-48
+ sll $3,$3,24
+ sra $3,$3,24
+ slt $4,$3,10
+ beq $4,$0,$L20
+ move $18,$16
+
+ b $L21
+ sb $3,0($16)
+
+$L20:
+ addiu $2,$2,-55
+ sb $2,0($16)
+$L21:
+ lb $2,0($18)
+ nop
+ slt $3,$2,16
+ bne $3,$0,$L22
+ addiu $2,$2,-32
+
+ sb $2,0($18)
+$L22:
+ jal pow16
+ move $4,$17
+
+ lb $3,0($18)
+ nop
+ mult $3,$2
+ mflo $2
+ addu $19,$19,$2
+ addiu $17,$17,-1
+ bne $17,$20,$L23
+ addiu $16,$16,1
+
+ b $L27
+ move $2,$19
+
+$L24:
+ move $19,$0
+ move $2,$19
+$L27:
+ lw $31,36($sp)
+ lw $20,32($sp)
+ lw $19,28($sp)
+ lw $18,24($sp)
+ lw $17,20($sp)
+ lw $16,16($sp)
+ j $31
+ addiu $sp,$sp,40
+
+ .set macro
+ .set reorder
+ .end hex2int
+ .size hex2int, .-hex2int
+ .align 2
+ .globl int2hex
+ .set nomips16
+ .set nomicromips
+ .ent int2hex
+ .type int2hex, @function
+int2hex:
+ .frame $sp,32,$31 # vars= 0, regs= 3/0, args= 16, gp= 0
+ .mask 0x80030000,-4
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+ addiu $sp,$sp,-32
+ sw $31,28($sp)
+ sw $17,24($sp)
+ sw $16,20($sp)
+ move $17,$4
+ move $16,$5
+ jal pow16
+ li $4,7 # 0x7
+
+ blez $2,$L29
+ move $5,$0
+
+$L34:
+ bne $2,$0,1f
+ div $0,$16,$2
+ break 7
+1:
+ mflo $3
+ beq $3,$0,$L30
+ nop
+
+ bne $2,$0,1f
+ div $0,$16,$2
+ break 7
+1:
+ mfhi $16
+ slt $4,$3,10
+ beq $4,$0,$L31
+ addu $4,$17,$5
+
+$L35:
+ addu $4,$17,$5
+ addiu $3,$3,48
+ sb $3,0($4)
+ b $L32
+ addiu $5,$5,1
+
+$L31:
+ addiu $3,$3,87
+ sb $3,0($4)
+ addiu $5,$5,1
+$L32:
+ bgez $2,$L33
+ move $3,$2
+
+ addiu $3,$2,15
+$L33:
+ sra $2,$3,4
+ bgtz $2,$L34
+ nop
+
+ b $L40
+ addu $17,$17,$5
+
+$L30:
+ bne $5,$0,$L35
+ nop
+
+ b $L32
+ nop
+
+$L29:
+ addu $17,$17,$5
+$L40:
+ li $2,10 # 0xa
+ sb $2,0($17)
+ addiu $2,$5,-1
+ lw $31,28($sp)
+ lw $17,24($sp)
+ lw $16,20($sp)
+ j $31
+ addiu $sp,$sp,32
+
+ .set macro
+ .set reorder
+ .end int2hex
+ .size int2hex, .-int2hex
+ .align 2
+ .globl main
+ .set nomips16
+ .set nomicromips
+ .ent main
+ .type main, @function
+main:
+ .frame $sp,64,$31 # vars= 16, regs= 8/0, args= 16, gp= 0
+ .mask 0x807f0000,-4
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+ addiu $sp,$sp,-64
+ sw $31,60($sp)
+ sw $22,56($sp)
+ sw $21,52($sp)
+ sw $20,48($sp)
+ sw $19,44($sp)
+ sw $18,40($sp)
+ sw $17,36($sp)
+ sw $16,32($sp)
+ li $2,1006632960 # 0x3c000000
+ addiu $4,$2,224
+ lui $3,%hi(uart)
+ sw $4,%lo(uart)($3)
+ li $3,17 # 0x11
+ sw $3,224($2)
+ li $3,16 # 0x10
+ lui $2,%hi(Ud+52)
+ sw $3,%lo(Ud+52)($2)
+ lui $21,%hi(buf)
+ addiu $21,$21,%lo(buf)
+ lui $22,%hi(buf+176)
+ addiu $22,$22,%lo(buf+176)
+ lui $18,%hi(Ud)
+ li $17,16 # 0x10
+$L45:
+ lw $5,0($21)
+ jal int2hex
+ addiu $4,$sp,16
+
+ li $19,-1 # 0xffffffffffffffff
+ addiu $20,$19,1
+$L53:
+ addiu $2,$sp,16
+ addu $16,$2,$20
+ addiu $2,$18,%lo(Ud)
+$L52:
+ lw $2,48($2)
+ nop
+ beq $2,$17,$L51
+ addiu $2,$sp,16
+
+ lb $4,0($16)
+ jal Putc
+ nop
+
+ beq $2,$0,$L52
+ addiu $2,$18,%lo(Ud)
+
+ move $19,$20
+ addiu $2,$sp,16
+$L51:
+ addu $2,$2,$19
+ lb $2,0($2)
+ nop
+ bne $2,$0,$L53
+ addiu $20,$19,1
+
+ addiu $21,$21,4
+ bne $22,$21,$L45
+ move $5,$0
+
+ jal startCounter
+ li $4,200 # 0xc8
+
+$L46:
+ jal readCounter
+ nop
+
+ b $L46
+ nop
+
+ .set macro
+ .set reorder
+ .end main
+ .size main, .-main
+
+ .comm uart,4,4
+ .globl buf
+ .data
+ .align 2
+ .type buf, @object
+ .size buf, 180
+buf:
+ .word 1
+ .word 1
+ .word 2
+ .word 3
+ .word 5
+ .word 8
+ .word 13
+ .word 21
+ .word 34
+ .word 55
+ .word 89
+ .word 144
+ .word 233
+ .word 377
+ .word 610
+ .word 987
+ .word 1597
+ .word 2584
+ .word 4181
+ .word 6765
+ .word 10946
+ .word 17711
+ .word 28657
+ .word 46368
+ .word 75025
+ .word 121393
+ .word 196418
+ .word 317811
+ .word 514229
+ .word 832040
+ .word 1346269
+ .word 2178309
+ .word 3524578
+ .word 5702887
+ .word 9227465
+ .word 14930352
+ .word 24157817
+ .word 39088169
+ .word 63245986
+ .word 102334155
+ .word 165580141
+ .word 267914296
+ .word 433494437
+ .word 701408733
+ .space 4
+ .ident "GCC: (GNU) 5.1.0"
diff --git a/cMIPS/tests/prog.bin b/cMIPS/tests/prog.bin
index bd31b673a85d5d5bc5702c072f8f6e55d600d816..33794068ce2915144852d3f29871b00bc0e4ef4e 100644
GIT binary patch
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--
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