diff --git a/cMIPS/tests/handlerUART.s b/cMIPS/tests/handlerUART.s index 627910a98aaddbd2017be055663048db962ace6d..e1333fb66c0c52d2a986e182709857b5bbb25004 100644 --- a/cMIPS/tests/handlerUART.s +++ b/cMIPS/tests/handlerUART.s @@ -67,8 +67,6 @@ UARTrxinter: sw $a1, 2*4($k0) # and return from interrupt addiu $a1, $zero, 1 sw $a1, 3*4($k0) # Signal new arrival - # Jedian: when a new char is on the UART's buffer, - # i have to enqueue it and update nrx. # check if queue is full, maybe increment lui $5, %hi(nrx) diff --git a/cMIPS/tests/jedidafu.c b/cMIPS/tests/jedidafu.c index 5aaa726f66ecc09f648fb1892c8ef002ecda1a56..3800fc187b071a94b5a926f7d8c443065e9451cd 100644 --- a/cMIPS/tests/jedidafu.c +++ b/cMIPS/tests/jedidafu.c @@ -10,6 +10,8 @@ extern Tproberx proberxs ; volatile Tserial *uart; // tell GCC not to optimize away code int proberx () { + if(proberxs.overun) + return -1; return Ud.nrx; } @@ -144,15 +146,15 @@ int main(void) { // receive a string through the UART serial interface uart = (void *)IO_UART_ADDR; // bottom of UART address range Ud.ntx = 16; // initializing number of empty spaces in tx queue - ioctl(ctrl_util(1, 1, 1, 1)); // Speed = 2, intRX = 1, intTX = 1, rts = 1 + ioctl(ctrl_util(2, 1, 1, 1)); // Speed = 2, intRX = 1, intTX = 1, rts = 1 do { state++; // state is a volatile variable just for optimize blocking while(!proberx()) to_stdout('-'); // wait until first reception - if(proberxs.overun){ - to_stdout('e'); - to_stdout('r'); - to_stdout('r'); + if(proberx() == -1){ + to_stdout('E'); + to_stdout('R'); + to_stdout('R'); to_stdout('\0'); return state; } @@ -177,8 +179,14 @@ int main(void) { // receive a string through the UART serial interface j = -1; do { j++; - while(((rxz = proberx())<10) && !(q=Putc(p[j]))); - + while(((rxz = proberx())<10 && (rxz >= 0)) && !(q=Putc(p[j]))); + if(rxz == -1){ + to_stdout('E'); + to_stdout('R'); + to_stdout('R'); + to_stdout('\0'); + return state; + } while((c=Getc()) != -1){ filona[tlona] = c; tlona++;