diff --git a/cMIPS/bin/compile.sh b/cMIPS/bin/compile.sh
index a1e8d9f9541d245e593158248a2aa88317de1f3c..0828bff21b376e42ea7cb9b016915603ac6e3118 100755
--- a/cMIPS/bin/compile.sh
+++ b/cMIPS/bin/compile.sh
@@ -149,8 +149,8 @@ mips-ld -EL -e _start ${memory_map} -I "${include}" --script $c_ld \
-o $elf ${c_start}.o ${c_hndlrs}.o ${c_io}.o $obj || exit 1
mips-objcopy -S -j .text -O binary $elf $bin && \
- mips-objcopy -S -j .data -j .rodata -j .rodata1 -j .data1 \
- -j .sdata -j .lit8 -j .lit4 -j .sbss -j .bss -j .PT \
+ mips-objcopy -S -j .data -j .data1 -j .lit8 -j .lit4 -j .sdata \
+ -j .sbss -j .bss -j .rodata1 -j .rodata -j .PT \
-O binary $elf $dat || exit 1
if [ $names = true ] ; then
@@ -162,8 +162,8 @@ fi
if [ $? == 0 -a $verbose = true ]; then
mips-objdump -z -D -EL $reg_names --show-raw-insn \
--section .text --section .data \
- --section .rodata --section .sdata --section .sbss \
- --section .bss --section .PT $elf
+ --section .sdata --section .sbss \
+ --section .bss --section .rodata --section .PT $elf
fi
if [ $? == 0 -a $miffile = true ] ; then
diff --git a/cMIPS/include/cMIPS.h b/cMIPS/include/cMIPS.h
index b0e414f653c097948b4b1cf4176eca1649cb7586..5e8b52a74c8921f55caf17b06f85036e281bb583 100644
--- a/cMIPS/include/cMIPS.h
+++ b/cMIPS/include/cMIPS.h
@@ -35,6 +35,8 @@ extern int readInt(int*);
extern void dumpRAM(void);
extern void cmips_delay(int);
+extern void delay_us(int);
+extern void delay_ms(int);
// external counter (peripheral)
extern void startCounter(int, int);
@@ -59,7 +61,8 @@ extern int LCDput(int);
extern void LCDclr(void);
extern void LCDtopLine(void);
extern void LCDbotLine(void);
-
+extern void LCDgotoxy(int, int);
+extern void LCDputc(char);
extern void DSP7SEGput(int MSD, int MSdot, int lsd, int lsdot);
extern int KBDget(void);
diff --git a/cMIPS/include/cMIPSio.c b/cMIPS/include/cMIPSio.c
index d8f781bd6e82d0c9fd08e84b8f6acab6bf8afd27..6cb11fa703b98338bcf4b6ec67785815ea03602f 100644
--- a/cMIPS/include/cMIPSio.c
+++ b/cMIPS/include/cMIPSio.c
@@ -232,10 +232,13 @@ int SWget(void) {
#define LCD_write_delay 750/4 // 15us / 20ns
#define LCD_busy 0x80
+#define LCD_LINE_TWO 0x40 // RAM address for second line
+
+
void LCDinit(void) {
int *IO = (int *)IO_LCD_ADDR;
- cmips_delay(LCD_reset_cycles); // wait for LCD controller to reset
+ cmips_delay(LCD_reset_cycles); // wait 50ms for LCD controller to reset
*IO = 0b00110000; // x30 = wake-up
cmips_delay(LCD_delay_30us);
@@ -265,11 +268,11 @@ void LCDinit(void) {
*IO = 0b00001111; // x0f displayON/OFF: Off, cur=on, blnk=on
cmips_delay(LCD_oper_delay);
- *IO = 0b00000110; // x06 entry mode: blink, noShift, addrs++
- cmips_delay(LCD_oper_delay);
-
*IO = 0b00000001; // x01 clear display -- DELAY=0.6ms
cmips_delay(LCD_clear_delay);
+
+ *IO = 0b00000110; // x06 entry mode: blink, noShift, addrs++
+ cmips_delay(LCD_oper_delay);
}
// check LCD's status register
@@ -284,13 +287,14 @@ int LCDset(int cmd) {
volatile int s;
*IO = cmd;
+ cmips_delay(LCD_oper_delay);
s = *IO;
while ( (s & LCD_busy) != 0) { s = *IO; }; // still busy?
return(s);
}
-// put a character on the current position
+// write a "raw" character on the current position
int LCDput(int c) {
int *IO = (int *)IO_LCD_ADDR;
volatile int s;
@@ -321,6 +325,32 @@ void LCDbotLine(void) {
*IO = 0b11000000; // xc0 RAMaddrs=40, cursor at home on BOTTOM LINE
cmips_delay(LCD_clear_delay);
}
+
+// set cursor at position (x,y)
+void LCDgotoxy(int x, int y) {
+ int address;
+
+ if(y != 1)
+ address = LCD_LINE_TWO;
+ else
+ address = 0;
+
+ address += (x - 1);
+
+ LCDset( 0x80 | (address & 0x7f) ); // write to control register
+}
+
+// write a "cooked" character to the display
+void LCDputc(char c) {
+ switch (c) {
+ case '\f' : LCDset(1); cmips_delay(LCD_clear_delay); break;
+ case '\n' : LCDgotoxy(1,2); break;
+ case '\b' : LCDset(0x10); break;
+ default : LCDput(c); break;
+ }
+}
+
+
//-----------------------------------------------------------------------
@@ -379,4 +409,3 @@ int readCounter(void) {
}; //--------------------------------------------------------------------
-
diff --git a/cMIPS/include/handlers.s b/cMIPS/include/handlers.s
index 114a0d8d7034c698fc4cadac5f4cb77455c4b722..42dc8d7ceb49228d776f94aa4abb0b96e745e721 100644
--- a/cMIPS/include/handlers.s
+++ b/cMIPS/include/handlers.s
@@ -5,8 +5,7 @@
.set noat # do not use register $1 as $at
.align 2
- .set M_StatusIEn,0x0000ff13 # STATUS.intEn=1, user mode, EXL=1
- # 0xff13 = -237
+ .set M_StatusIEn,0x0000ff11 # STATUS.intEn=1, user mode, EXL=0
#================================================================
# interrupt handler for external counter attached to IP5=HW3
@@ -146,10 +145,10 @@ UARTret:
.equ num_cycles, 64
.global countCompare
.ent countCompare
-countCompare:
- mfc0 $k1,c0_count # read COMPARE and clear IRQ
+countCompare:
+ mfc0 $k1,c0_count # read COUNT
addiu $k1,$k1,num_cycles # set next interrupt in so many ticks
- mtc0 $k1,c0_compare
+ mtc0 $k1,c0_compare # write to COMPARE to clear IRQ
mfc0 $k0, c0_status # Read STATUS register
ori $k0, $k0, M_StatusIEn # but do not modify its contents
@@ -241,11 +240,11 @@ disableInterr:
#================================================================
## TLB handlers
- ## page table entry is { EntryLo0 int0 EntryLo1 int1 }
+ ## page table entry is { EntryLo0, int0, EntryLo1, int1 }
## int{0,1} is
## { fill_31..6, Modified_5, Used_4, Writable_3, eXecutable_2,
## Status_10 },
- ## Status is 00=unmapped, 01=mapped, 10=secondary_storage
+ ## Status: 00=unmapped, 01=mapped, 10=secondary_storage, 11=panic
#================================================================
@@ -356,8 +355,6 @@ M_sec_mem: # print message and abort simulation
# (a) fix the fault by (re)loading the mapping into TLB[4];
# (b) check permissions in PT entry and (maybe) kill the process.
#
- .global _excp_saves
- .global _excp_0180ret
.global handle_TLBL
.global _PT
.set MIDDLE_RAM, (x_DATA_BASE_ADDR + (x_DATA_MEM_SZ/2))
@@ -438,8 +435,6 @@ L_ret: lw $a0, 9*4($k1) # nothing else to do, return
# returns 0 if V_addr purged, 1 if V_addr not in TLB (probe failure)
#
.text
- .global TLB_purge
-
.set noreorder
.ent TLB_purge
TLB_purge:
@@ -482,8 +477,9 @@ pu_miss: jr $ra
# delays processing by approx 4*$a0 processor cycles
.text
.set noreorder
- .global cmips_delay
+ .global cmips_delay, delay_cycle, delay_us, delay_ms
.ent cmips_delay
+delay_cycle:
cmips_delay:
addiu $a0, $a0, -1
nop
@@ -494,6 +490,52 @@ cmips_delay:
.end cmips_delay
#----------------------------------------------------------------
+ #================================================================
+ # delays processing by $a0 times 1 microsecond
+ # loop takes 4 cycles = 80ns @ 50MHz
+ # 1.000ns / 80 = 12.5
+ # multiply by 2 (sll), add 1, multiply by 12, divide by 2 (sra)
+ .text
+ .set noreorder
+ .ent delay_us
+delay_us:
+ sll $a0, $a0, 1
+ addiu $a0, $a0, 1
+ li $v0, 12
+ mult $v0, $a0
+ nop
+ mflo $a0
+ sra $a0, $a0, 1
+_d_us: addiu $a0, $a0, -1
+ nop
+ bne $a0, $zero, _d_us
+ nop
+ jr $ra
+ nop
+ .end delay_us
+ #----------------------------------------------------------------
+
+ #================================================================
+ # delays processing by $a0 times 1 msecond
+ # loop takes 4 cycles = 80ns @ 50MHz
+ # 1.000.000ns / 80 = 12500
+ .text
+ .set noreorder
+ .ent delay_ms
+delay_ms:
+ li $v0, 12500
+ mult $v0, $a0
+ nop
+ mflo $a0
+_d_ms: addiu $a0, $a0, -1
+ nop
+ bne $a0, $zero, _d_ms
+ nop
+ jr $ra
+ nop
+ .end delay_ms
+ #----------------------------------------------------------------
+
#================================================================
# print a message from within "the kernel"
diff --git a/cMIPS/include/start.s b/cMIPS/include/start.s
index ac090a7434c3a9f7070ff0b97fdc59aa84ba016e..661b0233c54e3265b0804c911a29f46dc26d4f6b 100644
--- a/cMIPS/include/start.s
+++ b/cMIPS/include/start.s
@@ -202,6 +202,7 @@ _excp_0100:
## area to save up to 16 registers
.bss
.align 2
+ .global _excp_saves, _excp_0180ret
.comm _excp_saves 16*4
# _excp_saves[0]=CAUSE, [1]=STATUS, [2]=ASID,
# [8]=$ra, [9]=$a0, [10]=$a1, [11]=$a2, [12]=$a3
@@ -209,7 +210,7 @@ _excp_0100:
.text
.set noreorder
.set noat
- .global _excp_saves, _excp_0180ret
+ .global _excp_0180ret
.global handle_Mod, handle_TLBL, handle_TLBS
.org x_EXCEPTION_0180,0 # exception vector_180
@@ -223,10 +224,11 @@ _excp_0180:
sw $k0, 0*4($k1)
andi $k0, $k0, 0x3f # keep only the first 16 ExceptionCodes & b"00"
- sll $k0, $k0, 1 # displacement in vector is 8 bytes
+ sll $k0, $k0, 1 # displacement in vector with 8 bytes/element
lui $k1, %hi(excp_tbl)
ori $k1, $k1, %lo(excp_tbl)
add $k1, $k1, $k0
+ nop
jr $k1
nop
@@ -251,32 +253,23 @@ excp_tbl: # see Table 8-25, pg 95,96
nop
wait 0x07 # 7 DBE addr error -- abort simulation
nop
-
- j h_syscall # 8
+ wait 0x08 # j h_syscall # 8 -- abort simulation
nop
-
- j h_breakpoint # 9
+ wait 0x09 # j h_breakpoint # 9 -- abort simulation
nop
-
- j h_RI # 10 reserved instruction
+ wait 0x0a # j h_RI # 10 reserved instruction -- abort simulation
nop
-
- j h_CpU # 11 coprocessor unusable
+ wait 0x0b # j h_CpU # 11 coprocessor unusable -- abort simulation
nop
-
- j h_Ov # 12 overflow
+ wait 0x0c # j h_Ov # 12 overflow -- abort simulation
nop
-
wait 0x0d # 13 trap -- abort simulation
nop
-
wait 0x0e # reserved, should never get here -- abort simulation
nop
-
wait 0x0f # FP exception, should never get here -- abort simulation
nop
-
h_TLBS:
h_syscall:
h_breakpoint:
@@ -288,10 +281,9 @@ _excp_0180ret:
lui $k1, %hi(_excp_saves) # Read previous contents of STATUS
ori $k1, $k1, %lo(_excp_saves)
lw $k0, 1*4($k1)
- # mfc0 $k0, c0_status
# and do not modify its contents
- ori $k0, $k0, M_StatusIEn # and keeping user/kernel mode
- mtc0 $k0, c0_status # -239 = 0xffff.ff11
+ ori $k0, $k0, M_StatusIEn # and keep user/kernel mode
+ mtc0 $k0, c0_status # but enable all interrupts
eret # Return from exception
.end _excp_0180
@@ -307,7 +299,7 @@ _excp_0180ret:
.extern extCounter # IRQ5 - hwIRQ3, see vhdl/tb_cMIPS.vhd
.set M_CauseIM,0x0000ff00 # keep bits 15..8 -> IM = IP
- .set M_StatusIEn,0xff11 # user mode, enable all interrupts
+ .set M_StatusIEn,0xff11 # user mode, enable all interrupts, EXL=0
.set noreorder
@@ -323,6 +315,7 @@ _excp_0200:
lui $k1, %hi(handlers_tbl) # plus displacement in j-table of 8 bytes
ori $k1, $k1, %lo(handlers_tbl)
add $k1, $k1, $k0
+ nop
jr $k1
nop
@@ -356,8 +349,8 @@ dismiss: # No pending request, must have been noise
_excp_0200ret:
mfc0 $k0, c0_status # Read STATUS register
- ori $k0, $k0, M_StatusIEn # except for re-enabling interrupts
- mtc0 $k0, c0_status # as it was on interrupt entry
+ ori $k0, $k0, M_StatusIEn # and re-enable interrupts
+ mtc0 $k0, c0_status # else keep as it was on int entry
eret # Return from interrupt
nop
diff --git a/cMIPS/include/syn_start.s b/cMIPS/include/syn_start.s
index 34297fd358f5a9df59974875a639f5dbe10d018c..40ce6a78ef06fa21b6997f481694509cb170ed62 100644
--- a/cMIPS/include/syn_start.s
+++ b/cMIPS/include/syn_start.s
@@ -9,8 +9,7 @@
.set noreorder
.align 2
.extern main
- .global _start,_exit,exit
- .global _excp_0000, _excp_0100, _excp_0180, _excp_0200, _excp_BFC0
+ .global _start, _exit, exit
.set MMU_WIRED, 2 ### do not change mapping for base of ROM, I/O
@@ -62,8 +61,8 @@ _start: nop
mtc0 $k0, cop0_Wired
- # initialize SP at top of RAM: ramTop - 16
- li $sp, ((x_DATA_BASE_ADDR+x_DATA_MEM_SZ) - 16)
+ # initialize SP at top of RAM: RAM[1] - 16
+ li $sp, ((x_DATA_BASE_ADDR + (2*4096)) - 16)
# set STATUS, cop0, hw interrupt IRQ7,IRQ6,IRQ5 enabled, user mode
li $k0, 0x1000e011
@@ -81,16 +80,36 @@ _exit: la $k0, HW_dsp7seg_addr # 7 segment display
li $k1, 0x0311 # display .1.1
sw $k1, 0($k0) # write to 7 segment display
- j exit # wait forever
+hexit: j hexit # wait forever
nop
.end _start
+
+
+ ##
+ ##================================================================
+ ## area to save up to 16 registers
+ .data
+ .align 2
+ .global _excp_saves
+ .comm _excp_saves 16*4
+
+
+ ##===============================================================
+ ## Page Table (empty for synthesis, address must be declared)
+ ##
+ ## .section .PT,"aw",@progbits, .org (x_DATA_BASE_ADDR+2*4096)
+ ## .align 4
+ .global _PT
+ .comm _PT 4
+
##
##================================================================
## exception vector_0000 TLBrefill
##
- .org x_EXCEPTION_0000,0
+ .text
+ .org x_EXCEPTION_0000,0
_excp_0000:
la $k0, HW_dsp7seg_addr # 7 segment display
li $k1, 0x0399 # display .9.9
@@ -125,6 +144,18 @@ _excp_0180:
h0180: j h0180 # wait forever
nop
+ ##
+ ##================================================================
+ ## exception return address (should never get here)
+ ##
+ .global _excp_0180ret
+_excp_0180ret:
+ la $k0, HW_dsp7seg_addr # 7 segment display
+ li $k1, 0x0344 # display .4.4
+ sw $k1, 0($k0) # write to 7 segment display
+heret: j heret # wait forever
+ nop
+
##
##===============================================================
@@ -152,7 +183,8 @@ hBFC0: j hBFC0 # wait forever
nop
##================================================================
-
+
+
##
##===============================================================
## main(), normal code starts below -- do not edit next line
diff --git a/cMIPS/tests/counter.s b/cMIPS/tests/counter.s
index 3f8ca8657e801039ce0373759b044788e7191536..09a069b64d804165fd95c838655bad39f7f06f72 100644
--- a/cMIPS/tests/counter.s
+++ b/cMIPS/tests/counter.s
@@ -1,3 +1,8 @@
+##
+## test if CP0 register COUNT counts monotonically and
+## if interrupts are generated when COUNT == COMPARE
+##
+
# Testing the internal counter is difficult because it counts clock cycles
# rather than instructions -- if the I/O or memory latencies change then
# the simulation output also changes and comparisons are impossible.
@@ -70,8 +75,8 @@ _excp_180:
# interrupt handler ------------------------------------------------
#
.org x_EXCEPTION_0200,0
-_excp_200:
- mfc0 $k1, cop0_COUNT # read current COUNT
+_excp_200:
+ mfc0 $k1, c0_count # read current COUNT
#sw $k1, 0($15)
addi $22, $22, numCy # interval elapsed?
#sw $22, 0($15) # show old+numCycles
@@ -80,7 +85,7 @@ _excp_200:
nop
addiu $k1, $k1, numCy # interrupt again in numCy cycles
- mtc0 $k1, cop0_COMPARE
+ mtc0 $k1, c0_compare # write to COMPARE clears the interrupt
#sw $k1, 0($15) # show new limit
li $30, 'i'
@@ -97,9 +102,6 @@ _excp_200:
and $k0, $k0, $k1
sw $k0, 0($15) # print CAUSE
- li $k0, 0x1800ff03 # enable interrupts, EXL=1
- mtc0 $k0, c0_status
- ehb
eret
err3:
@@ -118,7 +120,9 @@ err3:
sw $13, x_IO_ADDR_RANGE($15) # blank line
sw $22, 0($15)
- li $k0, 0x1800ff02 # disable interrupts, EXL=1
+ mfc0 $k0, c0_status
+ li $k1, 0xffff00fe # disable interrupts
+ and $k0, $k0, $k1
mtc0 $k0, c0_status
ehb
eret
@@ -148,7 +152,7 @@ main: la $15, x_IO_BASE_ADDR
li $13, '\n'
addiu $5,$zero, numCy # interrupt again in numCy cycles
- mtc0 $5,cop0_COMPARE
+ mtc0 $5,c0_compare
# enable Counter
mfc0 $5,c0_cause
@@ -163,10 +167,10 @@ main: la $15, x_IO_BASE_ADDR
addiu $11,$12,1 # this is a NOP
#
- # check if counting increases monotolically
+ # check if counting increases monotonically
#
here: addiu $11, $12, 2 # this is a NOP
- mfc0 $16, cop0_COUNT # read current COUNT
+ mfc0 $16, c0_count # read current COUNT
#sw $16, 0($15) # print current COUNT
slt $1, $21, $16 # old < new?
beq $1, $zero, err1 # no, stop simulation
@@ -190,13 +194,13 @@ there: sw $13, x_IO_ADDR_RANGE($15) # print a newline
or $5, $5, $6
mtc0 $5, c0_cause # disable counter
addiu $11,$12,6 # this is a NOP
- mfc0 $18, cop0_COUNT # print current COUNT
+ mfc0 $18, c0_count # print current COUNT
#sw $18, 0($15)
addiu $11,$12,7 # this is a NOP
addiu $11,$12,8 # this is a NOP
addiu $11,$12,9 # this is a NOP
addiu $11,$12,10 # this is a NOP
- mfc0 $19, cop0_COUNT # print current COUNT
+ mfc0 $19, c0_count # print current COUNT
#sw $19, 0($15)
bne $18, $19, err2 # did counter stop?
nop
@@ -245,3 +249,4 @@ err2: li $30, 'n'
sw $30, x_IO_ADDR_RANGE($15)
j exit
sw $13, x_IO_ADDR_RANGE($15) # print a newline
+
diff --git a/cMIPS/tests/mac_kbd_lcd.c b/cMIPS/tests/mac_kbd_lcd.c
index 670765dfaf312f5f5c2851621063c752c67f26f3..342677326ccfe43301e3d29b4d7e1a2fa5884010 100644
--- a/cMIPS/tests/mac_kbd_lcd.c
+++ b/cMIPS/tests/mac_kbd_lcd.c
@@ -5,9 +5,9 @@
//
int main(void) {
- int i;
- volatile int state;
- int c, k, s;
+ int i, j;
+ volatile int state, k;
+ int c, s;
LCDinit();
@@ -29,19 +29,34 @@ int main(void) {
LCDbotLine();
+ j = 0;
while ( 1 == 1 ) {
while( (k = KBDget()) == -1 ) {}; // wait for key
- DSP7SEGput(k, 1, 0, 0);
+ switch(k) {
+ case 10:
+ i = '*'; break;
+ case 11:
+ i = '#'; break;
+ case 15:
+ i = '0'; break;
+ default:
+ i = k + 0x30;
+ }
- LCDput(k + 0x30);
- // LCDput(0x20);
+ LCDput(i);
+ LCDput(0x20);
- cmips_delay(12500000);
+ j = j + 1;
- DSP7SEGput(0, 0, k, 1);
+ if (j == 5) {
+ j = 0;
+ LCDgotoxy(1, 0);
+ }
+
+ delay_ms(500);
}
diff --git a/cMIPS/tests/mac_lcd.s b/cMIPS/tests/mac_lcd.s
index 63f35f12c3e60c78fdd0a72f1f7d1018d7172165..3dd3f50dd1e3dde789424b8ce7679c899af32b71 100644
--- a/cMIPS/tests/mac_lcd.s
+++ b/cMIPS/tests/mac_lcd.s
@@ -378,3 +378,11 @@ delay: addiu $4, $4, -1
#
# string: .asciiz "Hello world! said cMIPS"
#
+ .bss
+nil1: .space 4
+ .sbss
+ .data
+nil3: .word 0
+ .sdata
+nil4: .word 0
+
diff --git a/cMIPS/vhdl/core.vhd b/cMIPS/vhdl/core.vhd
index 6a1765ab8873b2357b3a22aac50f983737d66844..a5bc8882382e638daa3afa6d410e3254f2565c62 100644
--- a/cMIPS/vhdl/core.vhd
+++ b/cMIPS/vhdl/core.vhd
@@ -109,8 +109,8 @@ architecture rtl of core is
MM_tlb_exception: out boolean;
EX_tlb_stage_MM: in boolean;
MM_tlb_stage_MM: out boolean;
- EX_int_req: in reg8;
- MM_int_req: out reg8;
+ EX_int_req: in reg6;
+ MM_int_req: out reg6;
EX_is_SC: in boolean;
MM_is_SC: out boolean;
EX_is_MFC0: in boolean;
@@ -147,7 +147,7 @@ architecture rtl of core is
signal ll_sc_bit, MM_LLbit,WB_LLbit: std_logic;
signal LL_update, LL_SC_abort, LL_SC_differ: std_logic;
signal EX_trapped, MM_trapped, EX_ovfl, trap_taken: boolean;
- signal int_req, MM_int_req: reg8;
+ signal int_req, MM_int_req: reg6;
signal can_trap,EX_can_trap : reg2;
signal is_trap, tr_signed, tr_stall: std_logic;
signal tr_is_equal, tr_less_than: std_logic;
@@ -1018,7 +1018,7 @@ begin
rt_stall := FALSE;
elsif MM_is_SC then
eq_fwd_B <= x"00000000";
- rs_stall := FALSE;
+ rt_stall := FALSE;
else
eq_fwd_B <= MM_result;
rt_stall := FALSE;
@@ -1787,17 +1787,16 @@ begin
is_nmi <= ( (nmi = '1') and (STATUS(STATUS_ERL) = '0') );
- int_req(7) <= (irq(5) or count_eq_compare);
- int_req(6) <= irq(4);
- int_req(5) <= irq(3);
- int_req(4) <= irq(2);
- int_req(3) <= irq(1);
- int_req(2) <= irq(0);
- int_req(1) <= CAUSE(CAUSE_IP1);
- int_req(0) <= CAUSE(CAUSE_IP0);
+ int_req(5) <= (irq(5) or count_eq_compare);
+ int_req(4) <= irq(4);
+ int_req(3) <= irq(3);
+ int_req(2) <= irq(2);
+ int_req(1) <= irq(1);
+ int_req(0) <= irq(0);
- interrupt <= int_req(7) or int_req(6) or int_req(5) or int_req(4) or
- int_req(3) or int_req(2) or int_req(1) or int_req(0);
+ interrupt <= int_req(5) or int_req(4) or int_req(3) or int_req(3) or
+ int_req(1) or int_req(0) or
+ CAUSE(CAUSE_IP1) or CAUSE(CAUSE_IP0);
is_interr <= ( (interrupt = '1') and
(STATUS(STATUS_EXL) = '0') and
@@ -2338,12 +2337,12 @@ begin
newCAUSE(CAUSE_IV) := CAUSE(CAUSE_IV);
newCAUSE(CAUSE_WP) := '0';
newCAUSE(21 downto 16) := b"000000";
- newCAUSE(CAUSE_IP7) := MM_int_req(7);
- newCAUSE(CAUSE_IP6) := MM_int_req(6);
- newCAUSE(CAUSE_IP5) := MM_int_req(5);
- newCAUSE(CAUSE_IP4) := MM_int_req(4);
- newCAUSE(CAUSE_IP3) := MM_int_req(3);
- newCAUSE(CAUSE_IP2) := MM_int_req(2);
+ newCAUSE(CAUSE_IP7) := MM_int_req(5);
+ newCAUSE(CAUSE_IP6) := MM_int_req(4);
+ newCAUSE(CAUSE_IP5) := MM_int_req(3);
+ newCAUSE(CAUSE_IP4) := MM_int_req(2);
+ newCAUSE(CAUSE_IP3) := MM_int_req(1);
+ newCAUSE(CAUSE_IP2) := MM_int_req(0);
newCAUSE(CAUSE_IP1) := CAUSE(CAUSE_IP1);
newCAUSE(CAUSE_IP0) := CAUSE(CAUSE_IP0);
newCAUSE(7) := '0';
diff --git a/cMIPS/vhdl/exception.vhd b/cMIPS/vhdl/exception.vhd
index 07fc8457aaefdea53529f7cdb6d664fdbf55c818..5c320d7effc25e81219ed0f0ca9026b7188f0ef1 100644
--- a/cMIPS/vhdl/exception.vhd
+++ b/cMIPS/vhdl/exception.vhd
@@ -139,8 +139,8 @@ entity reg_excp_EX_MM is
MM_tlb_exception: out boolean;
EX_tlb_stage_mm: in boolean;
MM_tlb_stage_mm: out boolean;
- EX_int_req: in reg8;
- MM_int_req: out reg8;
+ EX_int_req: in reg6;
+ MM_int_req: out reg6;
EX_is_SC: in boolean;
MM_is_SC: out boolean;
EX_is_MFC0: in boolean;
diff --git a/cMIPS/vhdl/incomplete/DHW.mif b/cMIPS/vhdl/incomplete/DHW.mif
new file mode 100644
index 0000000000000000000000000000000000000000..100f3f81d24c9474eccec2be51b3484dc0a3901d
--- /dev/null
+++ b/cMIPS/vhdl/incomplete/DHW.mif
@@ -0,0 +1,2864 @@
+
+-- Tamanho da imagem 256 x 128 --
+WIDTH=12;
+DEPTH=32768;
+
+ADDRESS_RADIX=HEX;
+DATA_RADIX=HEX;
+
+CONTENT BEGIN
+ [0..6a9] : 56;
+ 6aa : 66;
+ 6ab : 378;
+ [6ac..778] : 56;
+ [779..77c] : 66;
+ [77d..77e] : 378;
+ 77f : 588;
+ 780 : 689;
+ 781 : 478;
+ 782 : 588;
+ 783 : 378;
+ [784..787] : 66;
+ [788..7a8] : 56;
+ 7a9 : 377;
+ 7aa : abb;
+ 7ab : 378;
+ [7ac..875] : 56;
+ 876 : 167;
+ 877 : 689;
+ 878 : 799;
+ 879 : 466;
+ [87a..886] : 145;
+ 887 : 466;
+ 888 : 799;
+ 889 : 689;
+ 88a : 167;
+ [88b..8a7] : 56;
+ 8a8 : ede;
+ 8a9 : cde;
+ 8aa : 167;
+ [8ab..972] : 56;
+ 973 : 277;
+ 974 : 689;
+ 975 : 466;
+ 976 : 255;
+ [977..989] : 145;
+ 98a : 255;
+ 98b : 466;
+ 98c : 689;
+ 98d : 277;
+ [98e..9a4] : 56;
+ 9a5 : 267;
+ 9a6 : ccd;
+ 9a7 : fff;
+ 9a8 : 8aa;
+ 9a9 : 66;
+ [9aa..a70] : 56;
+ a71 : 588;
+ a72 : 477;
+ a73 : 256;
+ [a74..a8c] : 145;
+ a8d : 256;
+ a8e : 477;
+ a8f : 588;
+ [a90..aa2] : 56;
+ aa3 : 689;
+ aa4 : cde;
+ aa5 : fff;
+ aa6 : cdd;
+ aa7 : 378;
+ [aa8..b6d] : 56;
+ b6e : 167;
+ b6f : 478;
+ b70 : 367;
+ b71 : 255;
+ [b72..b7a] : 145;
+ b7b : 355;
+ [b7c..b7f] : 578;
+ b80 : 356;
+ [b81..b83] : 578;
+ b84 : 356;
+ b85 : 355;
+ [b86..b8e] : 145;
+ b8f : 255;
+ b90 : 367;
+ b91 : 588;
+ b92 : 167;
+ [b93..b9f] : 56;
+ ba0 : 478;
+ ba1 : acc;
+ ba2 : eee;
+ ba3 : fff;
+ ba4 : eee;
+ ba5 : 69a;
+ ba6 : 167;
+ [ba7..c6c] : 56;
+ c6d : 277;
+ c6e : 578;
+ c6f : 256;
+ [c70..c76] : 145;
+ c77 : 255;
+ c78 : 467;
+ c79 : 466;
+ c7a : 455;
+ c7b : 344;
+ [c7c..c84] : 111;
+ c85 : 344;
+ c86 : 455;
+ c87 : 466;
+ c88 : 467;
+ c89 : 367;
+ [c8a..c90] : 145;
+ c91 : 256;
+ c92 : 578;
+ c93 : 277;
+ [c94..c9b] : 56;
+ c9c : 167;
+ c9d : 488;
+ c9e : 9bc;
+ c9f : eee;
+ [ca0..ca1] : fff;
+ ca2 : dee;
+ ca3 : 8aa;
+ ca4 : 167;
+ [ca5..d6b] : 56;
+ d6c : 588;
+ d6d : 467;
+ [d6e..d74] : 145;
+ d75 : 466;
+ d76 : 566;
+ d77 : 455;
+ [d78..d88] : 111;
+ d89 : 232;
+ d8a : 566;
+ d8b : 466;
+ d8c : 255;
+ [d8d..d92] : 145;
+ d93 : 467;
+ d94 : 588;
+ [d95..d97] : 56;
+ d98 : 167;
+ d99 : 378;
+ d9a : 69a;
+ d9b : ccc;
+ [d9c..d9f] : fff;
+ da0 : cdd;
+ da1 : 79a;
+ da2 : 167;
+ [da3..e69] : 56;
+ e6a : 66;
+ e6b : 588;
+ [e6c..e71] : 145;
+ e72 : 256;
+ e73 : 466;
+ e74 : 677;
+ [e75..e8b] : 111;
+ e8c : 677;
+ e8d : 466;
+ e8e : 256;
+ [e8f..e92] : 145;
+ e93 : 156;
+ e94 : 467;
+ [e95..e96] : 8aa;
+ e97 : ddd;
+ [e98..e9c] : fff;
+ e9d : eff;
+ e9e : abc;
+ e9f : 478;
+ [ea0..f68] : 56;
+ f69 : 167;
+ f6a : 588;
+ f6b : 256;
+ [f6c..f70] : 145;
+ f71 : 356;
+ f72 : 577;
+ f73 : 222;
+ [f74..f8c] : 111;
+ f8d : 232;
+ f8e : 566;
+ f8f : 366;
+ f90 : 677;
+ f91 : 9aa;
+ f92 : ede;
+ [f93..f99] : fff;
+ f9a : eff;
+ f9b : cdd;
+ f9c : 378;
+ [f9d..1068] : 56;
+ 1069 : 377;
+ 106a : 356;
+ [106b..106f] : 145;
+ 1070 : 566;
+ 1071 : 455;
+ [1072..1088] : 111;
+ 1089 : 232;
+ 108a : 677;
+ 108b : aab;
+ 108c : ede;
+ [108d..1097] : fff;
+ 1098 : bab;
+ 1099 : 278;
+ 109a : 56;
+ 109b : 278;
+ 109c : bab;
+ 109d : 588;
+ [109e..1167] : 56;
+ 1168 : 378;
+ 1169 : 466;
+ [116a..116e] : 145;
+ 116f : 578;
+ 1170 : 222;
+ [1171..1182] : 111;
+ 1183 : 344;
+ 1184 : a9a;
+ 1185 : dcc;
+ 1186 : eee;
+ 1187 : eff;
+ [1188..1192] : fff;
+ 1193 : dcd;
+ 1194 : 8aa;
+ 1195 : 356;
+ 1196 : 256;
+ 1197 : 688;
+ 1198 : ccd;
+ 1199 : eee;
+ 119a : fff;
+ 119b : abb;
+ 119c : 167;
+ [119d..1266] : 56;
+ 1267 : 267;
+ 1268 : 577;
+ [1269..126d] : 145;
+ 126e : 467;
+ 126f : 344;
+ [1270..127d] : 111;
+ 127e : 333;
+ 127f : 999;
+ 1280 : ddd;
+ 1281 : eee;
+ [1282..128c] : fff;
+ 128d : ede;
+ 128e : bbb;
+ 128f : 688;
+ 1290 : 444;
+ 1291 : 788;
+ 1292 : aab;
+ 1293 : ccd;
+ 1294 : cde;
+ 1295 : fef;
+ [1296..1298] : fff;
+ 1299 : cdd;
+ 129a : 388;
+ [129b..1366] : 56;
+ 1367 : 588;
+ [1368..136c] : 145;
+ 136d : 256;
+ 136e : 455;
+ 136f : 222;
+ [1370..137a] : 111;
+ 137b : 343;
+ 137c : 999;
+ 137d : ddd;
+ [137e..1386] : fff;
+ 1387 : fef;
+ 1388 : abb;
+ 1389 : 899;
+ 138a : 777;
+ 138b : 978;
+ 138c : 999;
+ 138d : abb;
+ 138e : ccc;
+ 138f : ede;
+ [1390..1395] : fff;
+ 1396 : eee;
+ 1397 : 89a;
+ 1398 : 367;
+ 1399 : 588;
+ [139a..1465] : 56;
+ 1466 : 277;
+ 1467 : 366;
+ [1468..146c] : 145;
+ 146d : 566;
+ 146e : 232;
+ [146f..1478] : 111;
+ 1479 : 333;
+ 147a : 999;
+ 147b : eee;
+ [147c..1480] : fff;
+ 1481 : eee;
+ 1482 : cdd;
+ 1483 : 999;
+ 1484 : 799;
+ 1485 : 889;
+ 1486 : 888;
+ 1487 : 9aa;
+ 1488 : dbc;
+ 1489 : eee;
+ [148a..1492] : fff;
+ 1493 : ede;
+ 1494 : 8aa;
+ 1495 : 578;
+ [1496..1497] : 256;
+ 1498 : 467;
+ 1499 : 566;
+ 149a : 277;
+ [149b..1565] : 56;
+ 1566 : 378;
+ 1567 : 356;
+ [1568..156b] : 145;
+ 156c : 255;
+ 156d : 566;
+ [156e..1577] : 111;
+ 1578 : 555;
+ 1579 : edd;
+ [157a..157e] : fff;
+ 157f : 788;
+ 1580 : 899;
+ 1581 : 777;
+ 1582 : bbb;
+ 1583 : eee;
+ [1584..158d] : fff;
+ 158e : eee;
+ 158f : ccc;
+ 1590 : 999;
+ 1591 : 788;
+ 1592 : 455;
+ 1593 : 899;
+ 1594 : 689;
+ 1595 : 8bb;
+ 1596 : bcc;
+ 1597 : 89a;
+ 1598 : 145;
+ 1599 : 356;
+ 159a : 378;
+ [159b..1665] : 56;
+ 1666 : 377;
+ 1667 : 256;
+ [1668..166b] : 145;
+ 166c : 577;
+ 166d : 344;
+ [166e..1675] : 111;
+ 1676 : 122;
+ 1677 : 677;
+ [1678..167d] : fff;
+ 167e : abb;
+ 167f : 8aa;
+ [1680..168a] : fff;
+ 168b : eee;
+ 168c : ccc;
+ 168d : abb;
+ 168e : ccc;
+ 168f : ede;
+ [1690..1694] : fff;
+ 1695 : 9aa;
+ 1696 : 256;
+ [1697..1698] : 145;
+ 1699 : 256;
+ 169a : 377;
+ [169b..1764] : 56;
+ 1765 : 67;
+ 1766 : 477;
+ 1767 : 255;
+ [1768..176b] : 145;
+ 176c : 799;
+ [176d..1774] : 111;
+ 1775 : 221;
+ 1776 : 767;
+ 1777 : fef;
+ [1778..177a] : fff;
+ 177b : eee;
+ 177c : bab;
+ 177d : 677;
+ 177e : aaa;
+ [177f..1791] : fff;
+ 1792 : ccc;
+ 1793 : 666;
+ 1794 : 799;
+ [1795..1798] : 145;
+ 1799 : 255;
+ 179a : 477;
+ 179b : 67;
+ [179c..1864] : 56;
+ 1865 : 67;
+ 1866 : 477;
+ 1867 : 255;
+ [1868..186b] : 145;
+ 186c : 799;
+ [186d..1874] : 111;
+ 1875 : 555;
+ [1876..1879] : fff;
+ 187a : 888;
+ 187b : 989;
+ [187c..188d] : fff;
+ 188e : fef;
+ 188f : 9aa;
+ 1890 : 145;
+ [1891..1893] : 111;
+ 1894 : 799;
+ [1895..1898] : 145;
+ 1899 : 255;
+ 189a : 477;
+ 189b : 67;
+ [189c..1964] : 56;
+ 1965 : 67;
+ 1966 : 477;
+ 1967 : 255;
+ [1968..196b] : 145;
+ 196c : 799;
+ [196d..1974] : 111;
+ [1975..1978] : fff;
+ 1979 : bbc;
+ 197a : 678;
+ 197b : eee;
+ [197c..1986] : fff;
+ 1987 : eee;
+ 1988 : cbc;
+ 1989 : 799;
+ 198a : 555;
+ [198b..198c] : 333;
+ 198d : 566;
+ 198e : 788;
+ 198f : 666;
+ [1990..1993] : 111;
+ 1994 : 799;
+ [1995..1998] : 145;
+ 1999 : 255;
+ 199a : 477;
+ 199b : 67;
+ [199c..1a64] : 56;
+ 1a65 : 67;
+ 1a66 : 378;
+ 1a67 : 256;
+ [1a68..1a6b] : 145;
+ 1a6c : 577;
+ [1a6d..1a73] : 111;
+ 1a74 : eee;
+ 1a75 : fff;
+ 1a76 : bcc;
+ 1a77 : 777;
+ 1a78 : a9a;
+ 1a79 : ddd;
+ [1a7a..1a8c] : fff;
+ 1a8d : dee;
+ 1a8e : 566;
+ 1a8f : 222;
+ [1a90..1a93] : 111;
+ 1a94 : 577;
+ [1a95..1a98] : 145;
+ 1a99 : 255;
+ 1a9a : 477;
+ 1a9b : 67;
+ [1a9c..1b65] : 56;
+ 1b66 : 378;
+ 1b67 : 356;
+ [1b68..1b6b] : 145;
+ 1b6c : 566;
+ 1b6d : 455;
+ [1b6e..1b72] : 111;
+ 1b73 : aaa;
+ 1b74 : fff;
+ 1b75 : cdd;
+ 1b76 : 788;
+ 1b77 : ddd;
+ [1b78..1b89] : fff;
+ 1b8a : cdd;
+ 1b8b : 9aa;
+ 1b8c : 555;
+ [1b8d..1b92] : 111;
+ 1b93 : 455;
+ 1b94 : 566;
+ [1b95..1b98] : 145;
+ 1b99 : 356;
+ 1b9a : 378;
+ [1b9b..1c65] : 56;
+ 1c66 : 378;
+ 1c67 : 356;
+ [1c68..1c6c] : 145;
+ 1c6d : 677;
+ [1c6e..1c71] : 111;
+ 1c72 : 232;
+ 1c73 : 656;
+ 1c74 : 344;
+ 1c75 : 666;
+ 1c76 : eee;
+ [1c77..1c7f] : fff;
+ 1c80 : ddd;
+ 1c81 : bcc;
+ 1c82 : 9aa;
+ 1c83 : 888;
+ 1c84 : 877;
+ 1c85 : 777;
+ 1c86 : 666;
+ 1c87 : 555;
+ 1c88 : 344;
+ 1c89 : 333;
+ [1c8a..1c92] : 111;
+ 1c93 : 677;
+ [1c94..1c98] : 145;
+ 1c99 : 356;
+ 1c9a : 378;
+ [1c9b..1d65] : 56;
+ 1d66 : 167;
+ 1d67 : 577;
+ [1d68..1d6c] : 145;
+ 1d6d : 466;
+ 1d6e : 344;
+ [1d6f..1d74] : 111;
+ 1d75 : bcc;
+ [1d76..1d7a] : fff;
+ 1d7b : dee;
+ 1d7c : bcc;
+ 1d7d : 888;
+ 1d7e : 355;
+ 1d7f : 122;
+ [1d80..1d91] : 111;
+ 1d92 : 344;
+ 1d93 : 466;
+ [1d94..1d98] : 145;
+ 1d99 : 577;
+ 1d9a : 167;
+ [1d9b..1e66] : 56;
+ 1e67 : 488;
+ 1e68 : 255;
+ [1e69..1e6c] : 145;
+ 1e6d : 245;
+ 1e6e : 466;
+ 1e6f : 233;
+ [1e70..1e73] : 111;
+ 1e74 : 232;
+ [1e75..1e77] : fff;
+ 1e78 : eee;
+ 1e79 : abb;
+ 1e7a : 344;
+ [1e7b..1e90] : 111;
+ 1e91 : 223;
+ 1e92 : 356;
+ 1e93 : 245;
+ [1e94..1e97] : 145;
+ 1e98 : 255;
+ 1e99 : 488;
+ [1e9a..1f67] : 56;
+ 1f68 : 699;
+ [1f69..1f6d] : 145;
+ 1f6e : 355;
+ 1f6f : 566;
+ [1f70..1f73] : 111;
+ 1f74 : 576;
+ 1f75 : fff;
+ 1f76 : ede;
+ 1f77 : 677;
+ [1f78..1f90] : 111;
+ 1f91 : 566;
+ 1f92 : 355;
+ [1f93..1f97] : 145;
+ 1f98 : 699;
+ [1f99..2068] : 56;
+ 2069 : 588;
+ [206a..206e] : 145;
+ 206f : 466;
+ 2070 : 799;
+ [2071..2073] : 111;
+ [2074..2075] : bab;
+ [2076..208f] : 111;
+ 2090 : 799;
+ 2091 : 466;
+ [2092..2096] : 145;
+ 2097 : 588;
+ [2098..2168] : 56;
+ 2169 : 267;
+ 216a : 467;
+ [216b..216f] : 145;
+ 2170 : 245;
+ 2171 : 688;
+ 2172 : 333;
+ 2173 : 111;
+ 2174 : 576;
+ [2175..218d] : 111;
+ 218e : 333;
+ 218f : 688;
+ 2190 : 245;
+ [2191..2195] : 145;
+ 2196 : 467;
+ 2197 : 267;
+ [2198..2269] : 56;
+ 226a : 478;
+ 226b : 566;
+ [226c..2271] : 145;
+ 2272 : 467;
+ 2273 : 466;
+ [2274..228c] : 111;
+ 228d : 455;
+ 228e : 466;
+ [228f..2294] : 145;
+ 2295 : 566;
+ 2296 : 478;
+ [2297..236a] : 56;
+ 236b : 378;
+ 236c : 578;
+ [236d..2372] : 145;
+ 2373 : 255;
+ 2374 : 577;
+ 2375 : 466;
+ 2376 : 233;
+ [2377..2389] : 111;
+ 238a : 233;
+ 238b : 466;
+ 238c : 577;
+ 238d : 255;
+ [238e..2393] : 145;
+ 2394 : 578;
+ 2395 : 378;
+ [2396..246b] : 56;
+ 246c : 167;
+ 246d : 588;
+ 246e : 356;
+ [246f..2474] : 145;
+ 2475 : 245;
+ 2476 : 366;
+ 2477 : 456;
+ 2478 : 455;
+ 2479 : 333;
+ [247a..2486] : 111;
+ 2487 : 333;
+ 2488 : 455;
+ 2489 : 456;
+ 248a : 366;
+ 248b : 245;
+ [248c..2491] : 145;
+ 2492 : 356;
+ 2493 : 588;
+ 2494 : 167;
+ [2495..256c] : 56;
+ 256d : 66;
+ 256e : 478;
+ 256f : 467;
+ [2570..2578] : 145;
+ 2579 : 466;
+ 257a : 578;
+ 257b : 566;
+ [257c..257f] : 344;
+ 2580 : 333;
+ [2581..2584] : 344;
+ 2585 : 566;
+ 2586 : 578;
+ 2587 : 466;
+ [2588..2590] : 145;
+ 2591 : 467;
+ 2592 : 478;
+ 2593 : 66;
+ [2594..266e] : 56;
+ 266f : 267;
+ 2670 : 588;
+ 2671 : 466;
+ 2672 : 156;
+ [2673..268d] : 145;
+ 268e : 256;
+ 268f : 566;
+ 2690 : 588;
+ [2691..2770] : 56;
+ 2771 : 67;
+ 2772 : 488;
+ 2773 : 577;
+ 2774 : 256;
+ [2775..278b] : 145;
+ 278c : 256;
+ 278d : 577;
+ 278e : 488;
+ 278f : 67;
+ [2790..2874] : 56;
+ 2875 : 488;
+ 2876 : 677;
+ 2877 : 255;
+ [2878..2888] : 145;
+ 2889 : 255;
+ 288a : 677;
+ 288b : 488;
+ [288c..2976] : 56;
+ [2977..2978] : 66;
+ 2979 : 478;
+ [297a..297b] : 689;
+ 297c : 466;
+ 297d : 377;
+ 297e : 355;
+ [297f..2980] : 145;
+ 2981 : 255;
+ 2982 : 355;
+ 2983 : 356;
+ [2984..2986] : 689;
+ 2987 : 478;
+ [2988..2989] : 66;
+ [298a..29af] : 56;
+ 29b0 : 378;
+ [29b1..29b4] : 689;
+ 29b5 : 488;
+ 29b6 : 56;
+ 29b7 : 488;
+ [29b8..29bc] : 689;
+ [29bd..29cc] : 56;
+ 29cd : 167;
+ [29ce..29d3] : 689;
+ [29d4..2a7b] : 56;
+ [2a7c..2a7d] : 67;
+ [2a7e..2a82] : 167;
+ 2a83 : 67;
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+ 2aaf : 267;
+ [2ab0..2ab4] : fff;
+ 2ab5 : bcc;
+ 2ab6 : 56;
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+ [2ab8..2abc] : fff;
+ 2abd : 9ab;
+ [2abe..2acb] : 56;
+ 2acc : 89a;
+ [2acd..2ad1] : fff;
+ 2ad2 : cdd;
+ 2ad3 : 378;
+ [2ad4..2bae] : 56;
+ 2baf : 8aa;
+ [2bb0..2bb4] : fff;
+ 2bb5 : 378;
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+ 2bb7 : 378;
+ [2bb8..2bbc] : fff;
+ 2bbd : cdd;
+ 2bbe : 167;
+ [2bbf..2bc9] : 56;
+ 2bca : 167;
+ 2bcb : abc;
+ [2bcc..2bd0] : fff;
+ 2bd1 : ccd;
+ 2bd2 : 267;
+ [2bd3..2c2f] : 56;
+ 2c30 : 167;
+ [2c31..2c33] : 589;
+ 2c34 : 167;
+ [2c35..2c3f] : 56;
+ [2c40..2c43] : 589;
+ [2c44..2cad] : 56;
+ 2cae : 67;
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+ [2cb0..2cb3] : fff;
+ 2cb4 : ddd;
+ [2cb5..2cb7] : 56;
+ 2cb8 : ddd;
+ [2cb9..2cbd] : fff;
+ 2cbe : 699;
+ [2cbf..2cc8] : 56;
+ 2cc9 : 267;
+ 2cca : cdd;
+ [2ccb..2ccf] : fff;
+ 2cd0 : 9bc;
+ 2cd1 : 167;
+ [2cd2..2d2f] : 56;
+ 2d30 : cbc;
+ [2d31..2d33] : fff;
+ 2d34 : eee;
+ 2d35 : 267;
+ [2d36..2d3d] : 56;
+ 2d3e : 488;
+ 2d3f : ddd;
+ [2d40..2d42] : fff;
+ 2d43 : bbc;
+ [2d44..2d45] : 56;
+ [2d46..2d51] : 167;
+ 2d52 : 66;
+ [2d53..2d54] : 56;
+ [2d55..2d5e] : 167;
+ [2d5f..2d69] : 56;
+ 2d6a : 267;
+ [2d6b..2d6d] : 478;
+ 2d6e : 267;
+ [2d6f..2d75] : 56;
+ [2d76..2d79] : 167;
+ [2d7a..2d80] : 56;
+ [2d81..2d83] : 167;
+ [2d84..2d85] : 56;
+ 2d86 : 66;
+ [2d87..2d8f] : 167;
+ [2d90..2d95] : 56;
+ 2d96 : 66;
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+ [2d9a..2da0] : 56;
+ 2da1 : 167;
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+ 2da5 : 267;
+ 2da6 : 66;
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+ 2daf : fef;
+ [2db0..2db3] : fff;
+ 2db4 : 589;
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+ 2db8 : 478;
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+ 2dbe : 9bb;
+ 2dbf : 66;
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+ 2dc8 : 277;
+ 2dc9 : edd;
+ [2dca..2dce] : fff;
+ 2dcf : 799;
+ [2dd0..2e2e] : 56;
+ 2e2f : 167;
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+ 2e35 : cdd;
+ 2e36 : 66;
+ [2e37..2e3b] : 56;
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+ [2e3e..2e42] : fff;
+ 2e43 : 599;
+ 2e44 : 56;
+ 2e45 : 488;
+ [2e46..2e51] : fff;
+ 2e52 : acc;
+ 2e53 : 167;
+ 2e54 : 67;
+ 2e55 : eee;
+ [2e56..2e5f] : fff;
+ 2e60 : eee;
+ 2e61 : 589;
+ [2e62..2e65] : 56;
+ 2e66 : 167;
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+ [2e69..2e6f] : fff;
+ 2e70 : ccc;
+ 2e71 : 278;
+ [2e72..2e74] : 56;
+ 2e75 : 378;
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+ 2e79 : 799;
+ [2e7a..2e7f] : 56;
+ 2e80 : 89a;
+ [2e81..2e83] : fff;
+ 2e84 : 278;
+ 2e85 : 267;
+ 2e86 : cdd;
+ [2e87..2e90] : fff;
+ 2e91 : eee;
+ 2e92 : 689;
+ 2e93 : 66;
+ 2e94 : 56;
+ 2e95 : 167;
+ 2e96 : acc;
+ [2e97..2e98] : fff;
+ 2e99 : cdd;
+ 2e9a : 167;
+ [2e9b..2e9c] : 56;
+ 2e9d : 167;
+ 2e9e : 489;
+ 2e9f : bbc;
+ [2ea0..2ea6] : fff;
+ 2ea7 : bcc;
+ 2ea8 : 378;
+ [2ea9..2ead] : 56;
+ 2eae : 8bb;
+ [2eaf..2eb2] : fff;
+ 2eb3 : ede;
+ [2eb4..2eb8] : 56;
+ 2eb9 : ddd;
+ [2eba..2ebd] : fff;
+ 2ebe : eee;
+ 2ebf : 378;
+ [2ec0..2ec6] : 56;
+ 2ec7 : 589;
+ [2ec8..2ecc] : fff;
+ 2ecd : eee;
+ 2ece : 589;
+ [2ecf..2f2e] : 56;
+ 2f2f : 9aa;
+ [2f30..2f35] : fff;
+ 2f36 : 8bb;
+ [2f37..2f3a] : 56;
+ 2f3b : 699;
+ [2f3c..2f41] : fff;
+ 2f42 : ddd;
+ 2f43 : 267;
+ 2f44 : 56;
+ 2f45 : 9bb;
+ [2f46..2f51] : fff;
+ 2f52 : 69a;
+ 2f53 : 56;
+ 2f54 : 799;
+ [2f55..2f60] : fff;
+ 2f61 : fee;
+ 2f62 : 689;
+ [2f63..2f64] : 56;
+ 2f65 : 7ab;
+ [2f66..2f6b] : fff;
+ 2f6c : eff;
+ [2f6d..2f71] : fff;
+ 2f72 : 7aa;
+ [2f73..2f74] : 56;
+ 2f75 : 9bb;
+ [2f76..2f78] : fff;
+ 2f79 : 277;
+ [2f7a..2f7f] : 56;
+ 2f80 : eee;
+ [2f81..2f82] : fff;
+ 2f83 : cbc;
+ 2f84 : 56;
+ 2f85 : 489;
+ [2f86..2f92] : fff;
+ 2f93 : 489;
+ 2f94 : 56;
+ 2f95 : 378;
+ 2f96 : fef;
+ [2f97..2f98] : fff;
+ 2f99 : 89a;
+ [2f9a..2f9b] : 56;
+ 2f9c : 589;
+ [2f9d..2fa1] : fff;
+ [2fa2..2fa3] : eff;
+ [2fa4..2fa8] : fff;
+ 2fa9 : bcc;
+ [2faa..2fac] : 56;
+ 2fad : 378;
+ 2fae : ede;
+ [2faf..2fb2] : fff;
+ 2fb3 : 69a;
+ [2fb4..2fb8] : 56;
+ 2fb9 : 69a;
+ [2fba..2fbe] : fff;
+ 2fbf : 7aa;
+ [2fc0..2fc5] : 56;
+ 2fc6 : 8aa;
+ [2fc7..2fcb] : fff;
+ 2fcc : eff;
+ 2fcd : 277;
+ [2fce..302d] : 56;
+ 302e : 167;
+ 302f : cde;
+ [3030..3031] : fff;
+ 3032 : 9bc;
+ 3033 : bcc;
+ [3034..3036] : fff;
+ 3037 : 69a;
+ 3038 : 56;
+ 3039 : 167;
+ 303a : bcc;
+ [303b..303d] : fff;
+ 303e : abb;
+ 303f : dee;
+ [3040..3041] : fff;
+ 3042 : 9bc;
+ 3043 : 67;
+ 3044 : 56;
+ [3045..3047] : fff;
+ 3048 : 799;
+ [3049..3053] : 56;
+ [3054..3056] : fff;
+ 3057 : 9ab;
+ [3058..305d] : 56;
+ 305e : 79a;
+ [305f..3061] : fff;
+ 3062 : 79a;
+ 3063 : 56;
+ 3064 : ede;
+ [3065..3067] : fff;
+ 3068 : bab;
+ 3069 : 278;
+ [306a..306d] : 56;
+ 306e : 167;
+ 306f : cde;
+ [3070..3071] : fff;
+ 3072 : fef;
+ 3073 : 378;
+ 3074 : 56;
+ 3075 : eee;
+ [3076..3077] : fff;
+ 3078 : 799;
+ [3079..307e] : 56;
+ 307f : 588;
+ [3080..3082] : fff;
+ 3083 : 488;
+ 3084 : 56;
+ 3085 : ccc;
+ [3086..3088] : fff;
+ [3089..308e] : 56;
+ 308f : 278;
+ [3090..3092] : fff;
+ 3093 : 69a;
+ 3094 : 56;
+ 3095 : 69a;
+ [3096..3098] : fff;
+ 3099 : 278;
+ 309a : 167;
+ 309b : cde;
+ [309c..309e] : fff;
+ 309f : ccc;
+ 30a0 : 378;
+ [30a1..30a4] : 56;
+ 30a5 : 377;
+ 30a6 : ddd;
+ [30a7..30a8] : fff;
+ 30a9 : eee;
+ 30aa : 589;
+ [30ab..30ac] : 56;
+ 30ad : 69a;
+ [30ae..30b1] : fff;
+ 30b2 : fef;
+ 30b3 : 378;
+ [30b4..30b8] : 56;
+ 30b9 : 377;
+ 30ba : ddd;
+ [30bb..30be] : fff;
+ 30bf : eee;
+ [30c0..30c4] : 56;
+ 30c5 : 9ab;
+ [30c6..30ca] : fff;
+ 30cb : ccc;
+ [30cc..312d] : 56;
+ 312e : 69a;
+ [312f..3131] : fff;
+ 3132 : 79a;
+ 3133 : 56;
+ 3134 : eee;
+ [3135..3137] : fff;
+ 3138 : aab;
+ [3139..313b] : fff;
+ 313c : eee;
+ 313d : 167;
+ 313e : 7ab;
+ [313f..3140] : fff;
+ 3141 : fee;
+ 3142 : 689;
+ 3143 : 56;
+ 3144 : 699;
+ [3145..314d] : fff;
+ 314e : 9bc;
+ 314f : 67;
+ [3150..3152] : 56;
+ 3153 : 588;
+ [3154..3156] : fff;
+ 3157 : dde;
+ [3158..315c] : ccd;
+ 315d : eee;
+ [315e..3160] : fff;
+ 3161 : dee;
+ 3162 : 267;
+ 3163 : bcd;
+ [3164..3165] : fff;
+ 3166 : ede;
+ 3167 : 378;
+ [3168..316f] : 56;
+ 3170 : 167;
+ [3171..3173] : 56;
+ 3174 : 699;
+ [3175..3177] : fff;
+ [3178..317e] : 56;
+ 317f : bcd;
+ [3180..3181] : fff;
+ 3182 : ccd;
+ 3183 : 267;
+ 3184 : 56;
+ [3185..3188] : fff;
+ [3189..318c] : ccd;
+ 318d : cdd;
+ 318e : dee;
+ [318f..3191] : fff;
+ 3192 : ede;
+ 3193 : 378;
+ 3194 : 56;
+ 3195 : eee;
+ [3196..3197] : fff;
+ 3198 : cbc;
+ 3199 : 67;
+ 319a : 9bb;
+ [319b..319c] : fff;
+ 319d : fef;
+ 319e : 689;
+ [319f..31a5] : 56;
+ 31a6 : 79a;
+ [31a7..31a9] : fff;
+ 31aa : 79a;
+ [31ab..31ac] : 56;
+ 31ad : ede;
+ [31ae..31b1] : fff;
+ 31b2 : abc;
+ 31b3 : 167;
+ [31b4..31b8] : 56;
+ 31b9 : 167;
+ 31ba : abc;
+ [31bb..31bf] : fff;
+ 31c0 : 689;
+ [31c1..31c2] : 56;
+ 31c3 : 277;
+ 31c4 : eff;
+ [31c5..31c9] : fff;
+ 31ca : 8aa;
+ [31cb..322c] : 56;
+ 322d : 66;
+ 322e : 9bb;
+ [322f..3230] : fff;
+ 3231 : dee;
+ 3232 : 267;
+ 3233 : 56;
+ 3234 : 67;
+ 3235 : ddd;
+ [3236..3239] : fff;
+ 323a : eee;
+ 323b : 589;
+ 323c : 56;
+ 323d : 167;
+ 323e : bcc;
+ [323f..3240] : fff;
+ 3241 : cdd;
+ [3242..3243] : 56;
+ [3244..324c] : fff;
+ 324d : fef;
+ 324e : 689;
+ [324f..3252] : 56;
+ 3253 : bcd;
+ [3254..325f] : fff;
+ 3260 : ccc;
+ 3261 : 267;
+ 3262 : 378;
+ 3263 : dee;
+ [3264..3265] : fff;
+ 3266 : 8bb;
+ [3267..3273] : 56;
+ [3274..3276] : fff;
+ 3277 : abb;
+ [3278..327d] : 56;
+ 327e : 377;
+ 327f : dee;
+ [3280..3281] : fff;
+ 3282 : 8bb;
+ 3283 : 56;
+ 3284 : aab;
+ [3285..3290] : fff;
+ 3291 : cdd;
+ 3292 : 378;
+ 3293 : 56;
+ 3294 : 588;
+ [3295..3297] : fff;
+ 3298 : 167;
+ 3299 : 267;
+ 329a : ddd;
+ [329b..329c] : fff;
+ 329d : bdd;
+ [329e..32a4] : 56;
+ 32a5 : 167;
+ 32a6 : acc;
+ [32a7..32a8] : fff;
+ 32a9 : dee;
+ 32aa : 277;
+ 32ab : 56;
+ 32ac : 278;
+ [32ad..32b1] : fff;
+ 32b2 : 7aa;
+ [32b3..32b9] : 56;
+ 32ba : 689;
+ 32bb : fef;
+ [32bc..32bf] : fff;
+ 32c0 : ddd;
+ 32c1 : 56;
+ 32c2 : 589;
+ 32c3 : eee;
+ [32c4..32c8] : fff;
+ 32c9 : 79a;
+ [32ca..332c] : 56;
+ 332d : 278;
+ 332e : dee;
+ [332f..3330] : fff;
+ 3331 : abb;
+ [3332..3334] : 56;
+ 3335 : 488;
+ 3336 : eee;
+ [3337..3338] : fff;
+ 3339 : bbc;
+ 333a : 267;
+ [333b..333c] : 56;
+ 333d : 378;
+ [333e..3340] : fff;
+ 3341 : 79a;
+ 3342 : 56;
+ 3343 : 689;
+ [3344..3346] : fff;
+ 3347 : 589;
+ 3348 : 167;
+ 3349 : 267;
+ 334a : 167;
+ 334b : 267;
+ [334c..334d] : 167;
+ 334e : 66;
+ [334f..3351] : 56;
+ 3352 : 478;
+ 3353 : eee;
+ [3354..3355] : fff;
+ 3356 : bcd;
+ [3357..335a] : 8ab;
+ 335b : eee;
+ [335c..335d] : fff;
+ 335e : fef;
+ 335f : 488;
+ [3360..3361] : 56;
+ 3362 : 478;
+ 3363 : eee;
+ [3364..3365] : fff;
+ 3366 : ddd;
+ 3367 : 488;
+ [3368..336c] : 56;
+ 336d : 589;
+ 336e : bcc;
+ 336f : ddd;
+ 3370 : 8ab;
+ 3371 : 167;
+ 3372 : 56;
+ 3373 : 478;
+ [3374..3376] : fff;
+ 3377 : 69a;
+ [3378..337c] : 56;
+ 337d : 167;
+ 337e : bcc;
+ [337f..3380] : fff;
+ 3381 : eee;
+ 3382 : 478;
+ 3383 : 167;
+ [3384..3386] : fff;
+ 3387 : bcc;
+ [3388..338b] : 8ab;
+ 338c : eee;
+ [338d..338f] : fff;
+ 3390 : 588;
+ [3391..3393] : 56;
+ 3394 : dcd;
+ [3395..3396] : fff;
+ 3397 : dcd;
+ 3398 : 56;
+ 3399 : 267;
+ 339a : ccd;
+ [339b..339c] : fff;
+ 339d : dee;
+ 339e : 378;
+ [339f..33a3] : 56;
+ 33a4 : 478;
+ 33a5 : cdd;
+ [33a6..33a8] : fff;
+ 33a9 : 589;
+ [33aa..33ab] : 56;
+ 33ac : bcc;
+ [33ad..33b0] : fff;
+ 33b1 : dee;
+ 33b2 : 277;
+ [33b3..33b9] : 56;
+ 33ba : 66;
+ 33bb : cdd;
+ [33bc..33c0] : fff;
+ 33c1 : bcc;
+ [33c2..33c6] : fff;
+ 33c7 : fef;
+ 33c8 : 478;
+ [33c9..342c] : 56;
+ 342d : 599;
+ [342e..3430] : fff;
+ 3431 : 478;
+ [3432..3435] : 56;
+ 3436 : 69a;
+ 3437 : ccd;
+ 3438 : 378;
+ [3439..343c] : 56;
+ 343d : 8aa;
+ [343e..3440] : fff;
+ 3441 : 167;
+ 3442 : 56;
+ 3443 : bcc;
+ [3444..3447] : fff;
+ [3448..344f] : fef;
+ 3450 : dcc;
+ 3451 : 56;
+ 3452 : 7aa;
+ [3453..3454] : fff;
+ 3455 : eee;
+ 3456 : 478;
+ [3457..345a] : 56;
+ 345b : 589;
+ [345c..345e] : fff;
+ 345f : acc;
+ [3460..3461] : 56;
+ 3462 : 67;
+ 3463 : abc;
+ [3464..3467] : fff;
+ 3468 : ddd;
+ 3469 : bcc;
+ 346a : cdd;
+ 346b : ddd;
+ [346c..346f] : fff;
+ 3470 : fef;
+ 3471 : 69a;
+ 3472 : 56;
+ 3473 : 277;
+ [3474..3477] : fff;
+ 3478 : ddd;
+ [3479..347b] : bcc;
+ 347c : ddd;
+ [347d..3480] : fff;
+ 3481 : 69a;
+ 3482 : 56;
+ 3483 : 789;
+ [3484..3486] : fff;
+ 3487 : 388;
+ [3488..348b] : 56;
+ 348c : 167;
+ [348d..348f] : fff;
+ 3490 : ddd;
+ 3491 : 167;
+ 3492 : 56;
+ 3493 : 478;
+ [3494..3496] : fff;
+ 3497 : 599;
+ [3498..3499] : 56;
+ 349a : 7aa;
+ [349b..349e] : fff;
+ 349f : eee;
+ [34a0..34a1] : bcc;
+ 34a2 : cdd;
+ [34a3..34a6] : fff;
+ 34a7 : cdd;
+ 34a8 : 378;
+ [34a9..34aa] : 56;
+ 34ab : 167;
+ [34ac..34b0] : fff;
+ 34b1 : abc;
+ [34b2..34ba] : 56;
+ 34bb : 8aa;
+ [34bc..34c5] : fff;
+ 34c6 : cdd;
+ 34c7 : 267;
+ [34c8..352c] : 56;
+ 352d : dcd;
+ [352e..352f] : fff;
+ 3530 : dcd;
+ [3531..353c] : 56;
+ 353d : fef;
+ [353e..353f] : fff;
+ 3540 : bcc;
+ 3541 : 56;
+ 3542 : 478;
+ 3543 : eee;
+ [3544..354f] : fff;
+ 3550 : 589;
+ 3551 : 267;
+ 3552 : ccd;
+ [3553..3554] : fff;
+ 3555 : bcd;
+ [3556..355b] : 56;
+ 355c : bcc;
+ [355d..355f] : fff;
+ 3560 : 689;
+ [3561..3563] : 56;
+ 3564 : 789;
+ 3565 : ddd;
+ [3566..356c] : fff;
+ 356d : eee;
+ 356e : bcc;
+ 356f : 589;
+ [3570..3573] : 56;
+ 3574 : 478;
+ 3575 : cdd;
+ [3576..357d] : fff;
+ 357e : eee;
+ 357f : 9bb;
+ 3580 : 277;
+ 3581 : 56;
+ 3582 : 66;
+ 3583 : cdd;
+ [3584..3585] : fff;
+ 3586 : acc;
+ 3587 : 167;
+ [3588..358c] : 56;
+ 358d : 79a;
+ [358e..3590] : fff;
+ 3591 : abb;
+ 3592 : 56;
+ 3593 : abb;
+ [3594..3595] : fff;
+ 3596 : dee;
+ 3597 : 278;
+ [3598..359a] : 56;
+ 359b : 69a;
+ 359c : cdd;
+ [359d..35a4] : fff;
+ 35a5 : bcc;
+ 35a6 : 589;
+ 35a7 : 66;
+ [35a8..35aa] : 56;
+ 35ab : 9ab;
+ [35ac..35b0] : fff;
+ 35b1 : 478;
+ [35b2..35ba] : 56;
+ 35bb : 167;
+ [35bc..35c4] : fff;
+ 35c5 : abc;
+ 35c6 : 167;
+ [35c7..362c] : 56;
+ [362d..3630] : 278;
+ [3631..363c] : 56;
+ [363d..363f] : 278;
+ [3640..3641] : 56;
+ 3642 : 167;
+ [3643..364f] : 278;
+ 3650 : 56;
+ 3651 : 66;
+ [3652..3654] : 278;
+ 3655 : 267;
+ [3656..365c] : 56;
+ [365d..3660] : 278;
+ [3661..3665] : 56;
+ 3666 : 167;
+ 3667 : 488;
+ 3668 : 588;
+ 3669 : 89a;
+ 366a : 789;
+ 366b : 588;
+ 366c : 278;
+ [366d..3675] : 56;
+ 3676 : 167;
+ 3677 : 488;
+ [3678..367a] : 89a;
+ 367b : 689;
+ 367c : 588;
+ 367d : 267;
+ [367e..3682] : 56;
+ 3683 : 267;
+ [3684..3685] : 278;
+ 3686 : 167;
+ [3687..368c] : 56;
+ 368d : 66;
+ [368e..3690] : 278;
+ 3691 : 267;
+ 3692 : 56;
+ 3693 : 267;
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+ 7341 : 704;
+ 7342 : 825;
+ 7343 : a68;
+ 7344 : 947;
+ 7345 : 815;
+ 7346 : 825;
+ 7347 : 947;
+ 7348 : a68;
+ 7349 : 936;
+ [734a..734b] : 704;
+ 734c : 825;
+ 734d : a47;
+ 734e : b89;
+ 734f : cbc;
+ 7350 : 704;
+ 7351 : 804;
+ 7352 : 936;
+ 7353 : a68;
+ 7354 : 825;
+ [7355..7358] : 704;
+ 7359 : 925;
+ 735a : 936;
+ 735b : a58;
+ 735c : 947;
+ [735d..735f] : 704;
+ 7360 : 947;
+ 7361 : a68;
+ 7362 : 825;
+ [7363..7366] : 704;
+ 7367 : dbc;
+ 7368 : a47;
+ 7369 : 704;
+ 736a : 814;
+ 736b : dbc;
+ 736c : a57;
+ 736d : 814;
+ [736e..736f] : 936;
+ 7370 : 704;
+ 7371 : 947;
+ 7372 : a57;
+ 7373 : a47;
+ [7374..7375] : 704;
+ 7376 : 825;
+ 7377 : a68;
+ 7378 : 947;
+ 7379 : 936;
+ 737a : 804;
+ 737b : a57;
+ 737c : 704;
+ 737d : b68;
+ 737e : c9a;
+ 737f : 804;
+ [7380..739f] : 704;
+ 73a0 : 936;
+ [73a1..73a4] : fff;
+ 73a5 : a68;
+ 73a6 : 947;
+ 73a7 : eee;
+ [73a8..73aa] : fff;
+ 73ab : b89;
+ 73ac : 704;
+ 73ad : edd;
+ [73ae..73b0] : fff;
+ 73b1 : ecd;
+ 73b2 : b79;
+ [73b3..73b5] : fff;
+ 73b6 : ede;
+ [73b7..73b8] : dbc;
+ [73b9..73c0] : fff;
+ 73c1 : c9a;
+ [73c2..73c6] : 704;
+ 73c7 : c9a;
+ [73c8..73c9] : fff;
+ 73ca : fef;
+ 73cb : a57;
+ [73cc..73ce] : fff;
+ 73cf : cab;
+ [73d0..73d2] : fff;
+ 73d3 : c9a;
+ 73d4 : b68;
+ [73d5..73d7] : fff;
+ 73d8 : ede;
+ 73d9 : ccc;
+ [73da..73dc] : fff;
+ 73dd : cab;
+ [73de..73e1] : 704;
+ 73e2 : 814;
+ 73e3 : dbc;
+ [73e4..73e6] : fff;
+ 73e7 : ecd;
+ 73e8 : dbc;
+ 73e9 : edd;
+ [73ea..73ec] : fff;
+ 73ed : cab;
+ [73ee..740f] : 704;
+ 7410 : a57;
+ 7411 : 9aa;
+ 7412 : 295;
+ [7413..7418] : 93;
+ 7419 : 484;
+ 741a : bc1;
+ [741b..741e] : fd0;
+ 741f : ba2;
+ 7420 : 167;
+ [7421..7422] : 56;
+ 7423 : 166;
+ 7424 : 9aa;
+ 7425 : a57;
+ [7426..742b] : 704;
+ 742c : 815;
+ 742d : c9a;
+ 742e : cab;
+ 742f : 925;
+ 7430 : 704;
+ 7431 : 957;
+ 7432 : 936;
+ 7433 : b8a;
+ 7434 : cab;
+ 7435 : 825;
+ 7436 : cab;
+ 7437 : a58;
+ 7438 : 957;
+ 7439 : dbc;
+ 743a : a57;
+ 743b : a68;
+ 743c : ddd;
+ 743d : 947;
+ 743e : 815;
+ 743f : ecd;
+ 7440 : 815;
+ 7441 : a47;
+ 7442 : cac;
+ 7443 : a47;
+ 7444 : 957;
+ 7445 : 814;
+ 7446 : 826;
+ 7447 : 946;
+ 7448 : 936;
+ 7449 : cab;
+ [744a..744b] : a57;
+ 744c : ddd;
+ 744d : 957;
+ 744e : b69;
+ 744f : cbc;
+ 7450 : 704;
+ 7451 : b8a;
+ 7452 : b9a;
+ 7453 : 957;
+ 7454 : dbc;
+ 7455 : b79;
+ [7456..7458] : 704;
+ 7459 : c8a;
+ 745a : cab;
+ 745b : 946;
+ 745c : b8a;
+ 745d : dbc;
+ 745e : 815;
+ 745f : dcc;
+ 7460 : b79;
+ 7461 : a47;
+ 7462 : cac;
+ 7463 : a47;
+ [7464..7466] : 704;
+ 7467 : dbc;
+ 7468 : cab;
+ 7469 : b79;
+ 746a : b8a;
+ 746b : dac;
+ 746c : 815;
+ 746d : b68;
+ 746e : dbc;
+ 746f : a58;
+ 7470 : 704;
+ 7471 : 957;
+ 7472 : 936;
+ 7473 : b8a;
+ 7474 : dcc;
+ 7475 : 825;
+ 7476 : cbc;
+ 7477 : a68;
+ 7478 : 957;
+ 7479 : 925;
+ 747a : 815;
+ 747b : ecd;
+ 747c : 704;
+ 747d : a57;
+ 747e : c8a;
+ 747f : 804;
+ [7480..749f] : 704;
+ 74a0 : 936;
+ [74a1..74a4] : fff;
+ 74a5 : a89;
+ 74a6 : 936;
+ 74a7 : ede;
+ [74a8..74aa] : fff;
+ 74ab : b79;
+ 74ac : 704;
+ 74ad : ddd;
+ [74ae..74b0] : fff;
+ 74b1 : fee;
+ 74b2 : edd;
+ [74b3..74c1] : fff;
+ 74c2 : cab;
+ 74c3 : a58;
+ 74c4 : 957;
+ 74c5 : a58;
+ 74c6 : 947;
+ 74c7 : b9a;
+ [74c8..74c9] : fff;
+ 74ca : fef;
+ 74cb : 936;
+ 74cc : b8a;
+ [74cd..74d2] : fff;
+ 74d3 : c9a;
+ 74d4 : b68;
+ [74d5..74d7] : fff;
+ 74d8 : ede;
+ 74d9 : a68;
+ [74da..74dd] : fff;
+ 74de : cab;
+ 74df : a68;
+ 74e0 : 957;
+ 74e1 : a58;
+ 74e2 : c9a;
+ 74e3 : fef;
+ [74e4..74e7] : fff;
+ 74e8 : fef;
+ [74e9..74ec] : fff;
+ 74ed : fee;
+ 74ee : a57;
+ [74ef..7510] : 704;
+ 7511 : a58;
+ 7512 : 899;
+ 7513 : 385;
+ [7514..751a] : 93;
+ 751b : 7b2;
+ [751c..7520] : fd0;
+ 7521 : 685;
+ 7522 : 568;
+ 7523 : aab;
+ 7524 : a68;
+ [7525..752c] : 704;
+ 752d : b68;
+ 752e : b8a;
+ 752f : 704;
+ 7530 : 814;
+ [7531..7532] : b8a;
+ 7533 : cab;
+ 7534 : ede;
+ 7535 : 826;
+ 7536 : bab;
+ 7537 : 826;
+ 7538 : 704;
+ 7539 : b68;
+ 753a : b8a;
+ 753b : a89;
+ 753c : bab;
+ [753d..753e] : 704;
+ 753f : dcd;
+ 7540 : 825;
+ 7541 : b68;
+ 7542 : b8a;
+ [7543..7544] : 704;
+ 7545 : 804;
+ 7546 : a47;
+ 7547 : b8a;
+ 7548 : b89;
+ 7549 : dbc;
+ 754a : b79;
+ 754b : c9a;
+ 754c : b68;
+ 754d : 704;
+ 754e : 936;
+ 754f : dbc;
+ 7550 : 704;
+ 7551 : dbc;
+ 7552 : 936;
+ 7553 : 704;
+ 7554 : 936;
+ 7555 : dcd;
+ [7556..7558] : 704;
+ 7559 : b8a;
+ 755a : b79;
+ 755b : 704;
+ 755c : 936;
+ 755d : dcd;
+ 755e : 936;
+ 755f : cab;
+ [7560..7561] : 704;
+ 7562 : b79;
+ 7563 : b8a;
+ [7564..7566] : 704;
+ 7567 : dcd;
+ 7568 : a57;
+ 7569 : 825;
+ 756a : 936;
+ 756b : dcd;
+ 756c : 925;
+ 756d : b68;
+ 756e : b8a;
+ 756f : 704;
+ 7570 : 814;
+ [7571..7573] : b8a;
+ 7574 : fff;
+ 7575 : 804;
+ 7576 : a57;
+ 7577 : cab;
+ 7578 : b89;
+ 7579 : 936;
+ 757a : 815;
+ 757b : ecd;
+ 757c : 704;
+ 757d : a58;
+ 757e : c9b;
+ 757f : 814;
+ [7580..759f] : 704;
+ 75a0 : 936;
+ [75a1..75a4] : fff;
+ 75a5 : a68;
+ 75a6 : 947;
+ 75a7 : eee;
+ [75a8..75aa] : fff;
+ 75ab : b79;
+ 75ac : 704;
+ 75ad : edd;
+ [75ae..75b4] : fff;
+ 75b5 : dbc;
+ [75b6..75b8] : 704;
+ 75b9 : a57;
+ [75ba..75bc] : fff;
+ 75bd : fef;
+ 75be : dbc;
+ 75bf : eee;
+ [75c0..75c5] : fff;
+ 75c6 : c9b;
+ 75c7 : dbc;
+ [75c8..75c9] : fff;
+ 75ca : fef;
+ 75cb : 936;
+ 75cc : 825;
+ [75cd..75d2] : fff;
+ 75d3 : c9a;
+ 75d4 : b9a;
+ [75d5..75d7] : fff;
+ 75d8 : ede;
+ 75d9 : 804;
+ 75da : b68;
+ 75db : edd;
+ [75dc..75e5] : fff;
+ 75e6 : a68;
+ [75e7..75e8] : 704;
+ 75e9 : 804;
+ 75ea : c9a;
+ [75eb..75ed] : fff;
+ 75ee : dbc;
+ 75ef : 815;
+ [75f0..7611] : 704;
+ 7612 : 946;
+ 7613 : a9a;
+ 7614 : 677;
+ 7615 : 195;
+ [7616..761c] : 93;
+ 761d : cc0;
+ [761e..761f] : fd0;
+ 7620 : cb1;
+ 7621 : dc4;
+ 7622 : 99a;
+ 7623 : 946;
+ [7624..762c] : 704;
+ 762d : b68;
+ 762e : b8a;
+ 762f : 704;
+ 7630 : b68;
+ 7631 : cab;
+ 7632 : 815;
+ 7633 : b68;
+ 7634 : ddd;
+ 7635 : 825;
+ 7636 : b9a;
+ 7637 : 947;
+ 7638 : 815;
+ 7639 : c9a;
+ 763a : a68;
+ 763b : a58;
+ 763c : bab;
+ [763d..763e] : 704;
+ 763f : dcd;
+ 7640 : 925;
+ 7641 : a58;
+ 7642 : c9b;
+ 7643 : 825;
+ 7644 : 815;
+ 7645 : 825;
+ 7646 : cab;
+ 7647 : a47;
+ 7648 : 815;
+ 7649 : c9b;
+ 764a : b79;
+ 764b : a68;
+ 764c : ccc;
+ 764d : 815;
+ 764e : a47;
+ 764f : dbc;
+ 7650 : 704;
+ 7651 : b9a;
+ 7652 : a79;
+ 7653 : 815;
+ 7654 : b8a;
+ 7655 : c9a;
+ [7656..7658] : 704;
+ 7659 : b8a;
+ 765a : b79;
+ 765b : 704;
+ 765c : 814;
+ 765d : dcd;
+ 765e : 925;
+ 765f : dbc;
+ 7660 : 826;
+ 7661 : 825;
+ 7662 : c9b;
+ 7663 : a58;
+ [7664..7666] : 704;
+ 7667 : dbc;
+ 7668 : b79;
+ 7669 : 815;
+ 766a : 925;
+ 766b : ecd;
+ 766c : a57;
+ 766d : a47;
+ 766e : b8a;
+ 766f : 704;
+ 7670 : 936;
+ 7671 : dbc;
+ 7672 : 815;
+ 7673 : 947;
+ 7674 : fff;
+ 7675 : 804;
+ 7676 : 814;
+ 7677 : 815;
+ 7678 : 947;
+ 7679 : ecd;
+ 767a : 825;
+ 767b : ecd;
+ 767c : 704;
+ 767d : b68;
+ 767e : c8a;
+ 767f : 814;
+ 7680 : b68;
+ [7681..769f] : 704;
+ 76a0 : 925;
+ [76a1..76a4] : a89;
+ 76a5 : 936;
+ 76a6 : 925;
+ 76a7 : a79;
+ [76a8..76aa] : a89;
+ 76ab : 936;
+ 76ac : 704;
+ 76ad : a58;
+ [76ae..76b4] : a89;
+ 76b5 : 825;
+ [76b6..76b8] : 704;
+ 76b9 : 814;
+ 76ba : a68;
+ [76bb..76bd] : a89;
+ 76be : 946;
+ 76bf : 704;
+ 76c0 : 925;
+ 76c1 : a58;
+ 76c2 : b9a;
+ 76c3 : cab;
+ 76c4 : a89;
+ 76c5 : a79;
+ 76c6 : 936;
+ 76c7 : a47;
+ [76c8..76ca] : a89;
+ 76cb : 825;
+ 76cc : 704;
+ 76cd : a58;
+ [76ce..76d2] : a89;
+ 76d3 : 936;
+ 76d4 : a57;
+ [76d5..76d7] : a89;
+ 76d8 : a57;
+ [76d9..76db] : 704;
+ 76dc : 925;
+ 76dd : a58;
+ 76de : b9a;
+ [76df..76e0] : cab;
+ [76e1..76e4] : a89;
+ 76e5 : a68;
+ 76e6 : 814;
+ [76e7..76e9] : 704;
+ 76ea : 925;
+ 76eb : a79;
+ [76ec..76ee] : a89;
+ 76ef : 825;
+ [76f0..7713] : 704;
+ 7714 : a58;
+ 7715 : bab;
+ 7716 : 889;
+ 7717 : 576;
+ [7718..771d] : 194;
+ 771e : 385;
+ 771f : a9a;
+ 7720 : b9b;
+ 7721 : a47;
+ [7722..772c] : 704;
+ 772d : 825;
+ 772e : 947;
+ [772f..7730] : 704;
+ 7731 : a68;
+ 7732 : b9a;
+ 7733 : a68;
+ 7734 : a58;
+ 7735 : 804;
+ 7736 : a68;
+ [7737..7738] : b9a;
+ 7739 : a47;
+ 773a : 704;
+ 773b : a47;
+ 773c : a58;
+ [773d..773e] : 704;
+ 773f : a79;
+ [7740..7741] : 704;
+ 7742 : 936;
+ 7743 : b8a;
+ 7744 : b9a;
+ 7745 : 825;
+ 7746 : 936;
+ 7747 : b8a;
+ 7748 : b9a;
+ 7749 : a58;
+ 774a : 936;
+ 774b : 704;
+ 774c : a58;
+ [774d..774e] : b9a;
+ 774f : a68;
+ 7750 : 704;
+ 7751 : 815;
+ 7752 : b79;
+ 7753 : b9a;
+ 7754 : a58;
+ [7755..7758] : 704;
+ [7759..775a] : 936;
+ [775b..775c] : 704;
+ 775d : a79;
+ [775e..775f] : 704;
+ 7760 : b9a;
+ 7761 : b8a;
+ 7762 : 936;
+ [7763..7766] : 704;
+ 7767 : a47;
+ [7768..7769] : b9a;
+ 776a : b79;
+ 776b : 815;
+ 776c : 704;
+ 776d : 825;
+ 776e : 947;
+ [776f..7770] : 704;
+ 7771 : a68;
+ 7772 : b9a;
+ 7773 : a68;
+ 7774 : b9a;
+ 7775 : 815;
+ 7776 : b79;
+ [7777..7778] : b9a;
+ 7779 : 825;
+ 777a : 815;
+ 777b : a79;
+ 777c : 704;
+ 777d : 825;
+ 777e : 947;
+ 777f : 704;
+ 7780 : b9a;
+ [7781..7816] : 704;
+ 7817 : 925;
+ 7818 : b68;
+ [7819..781c] : bab;
+ 781d : b68;
+ 781e : 936;
+ [781f..79c6] : 704;
+ 79c7 : cab;
+ 79c8 : ddd;
+ 79c9 : 704;
+ 79ca : 957;
+ 79cb : dcd;
+ 79cc : 936;
+ 79cd : 804;
+ 79ce : 926;
+ 79cf : 804;
+ 79d0 : 704;
+ 79d1 : 926;
+ 79d2 : 815;
+ 79d3 : 825;
+ 79d4 : 704;
+ 79d5 : 825;
+ 79d6 : 804;
+ 79d7 : 814;
+ 79d8 : 704;
+ 79d9 : 804;
+ 79da : 815;
+ 79db : 704;
+ 79dc : 926;
+ 79dd : 825;
+ [79de..79df] : 704;
+ [79e0..79e1] : a68;
+ 79e2 : 926;
+ 79e3 : cab;
+ 79e4 : 926;
+ 79e5 : b8a;
+ 79e6 : 815;
+ 79e7 : 704;
+ 79e8 : ddd;
+ 79e9 : b79;
+ 79ea : 936;
+ 79eb : a79;
+ 79ec : ddd;
+ 79ed : 804;
+ 79ee : a68;
+ 79ef : 826;
+ [79f0..7ac6] : 704;
+ 7ac7 : cab;
+ 7ac8 : a57;
+ 7ac9 : b8a;
+ 7aca : b68;
+ 7acb : bab;
+ 7acc : 936;
+ 7acd : a68;
+ 7ace : cbc;
+ 7acf : a58;
+ 7ad0 : ddd;
+ 7ad1 : 925;
+ 7ad2 : 936;
+ 7ad3 : cab;
+ 7ad4 : 826;
+ 7ad5 : a57;
+ 7ad6 : b89;
+ [7ad7..7ad8] : b8a;
+ 7ad9 : a57;
+ 7ada : 936;
+ 7adb : 925;
+ 7adc : b79;
+ 7add : b9b;
+ 7ade : 957;
+ 7adf : 704;
+ [7ae0..7ae1] : a58;
+ 7ae2 : 704;
+ 7ae3 : a57;
+ 7ae4 : b68;
+ 7ae5 : dbc;
+ [7ae6..7ae7] : b68;
+ 7ae8 : cbc;
+ 7ae9 : 936;
+ 7aea : c9a;
+ 7aeb : b79;
+ 7aec : 947;
+ 7aed : b9b;
+ 7aee : a58;
+ 7aef : 804;
+ [7af0..7bc6] : 704;
+ 7bc7 : cab;
+ 7bc8 : 704;
+ 7bc9 : c9b;
+ 7bca : a68;
+ 7bcb : b8a;
+ 7bcc : 936;
+ 7bcd : dcc;
+ 7bce : b8a;
+ 7bcf : b79;
+ 7bd0 : c9a;
+ 7bd1 : a79;
+ 7bd2 : a58;
+ 7bd3 : dbc;
+ 7bd4 : 704;
+ 7bd5 : 936;
+ 7bd6 : b8a;
+ 7bd7 : b79;
+ 7bd8 : a68;
+ 7bd9 : b9a;
+ 7bda : a68;
+ 7bdb : c8a;
+ 7bdc : c9b;
+ 7bdd : b8a;
+ 7bde : 957;
+ 7bdf : 704;
+ 7be0 : a47;
+ 7be1 : cab;
+ 7be2 : b8a;
+ 7be3 : c9a;
+ 7be4 : 814;
+ 7be5 : cab;
+ 7be6 : 815;
+ 7be7 : 704;
+ 7be8 : ede;
+ 7be9 : 814;
+ 7bea : c9a;
+ 7beb : 947;
+ 7bec : 704;
+ 7bed : cbc;
+ 7bee : a47;
+ [7bef..7fff] : 704;
+END;
diff --git a/cMIPS/vhdl/incomplete/memoriavideo.qip b/cMIPS/vhdl/incomplete/memoriavideo.qip
new file mode 100644
index 0000000000000000000000000000000000000000..c3d80ea93cada8220e5676f9c0eb405e692551d7
--- /dev/null
+++ b/cMIPS/vhdl/incomplete/memoriavideo.qip
@@ -0,0 +1,5 @@
+set_global_assignment -name IP_TOOL_NAME "ROM: 1-PORT"
+set_global_assignment -name IP_TOOL_VERSION "12.1"
+set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) "memoriavideo.vhd"]
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "memoriavideo_inst.vhd"]
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "memoriavideo.cmp"]
diff --git a/cMIPS/vhdl/incomplete/memoriavideo.vhd b/cMIPS/vhdl/incomplete/memoriavideo.vhd
new file mode 100644
index 0000000000000000000000000000000000000000..f18b4332978e833ff8b995208e2b883d547d2b7b
--- /dev/null
+++ b/cMIPS/vhdl/incomplete/memoriavideo.vhd
@@ -0,0 +1,169 @@
+-- megafunction wizard: %ROM: 1-PORT%
+-- GENERATION: STANDARD
+-- VERSION: WM1.0
+-- MODULE: altsyncram
+
+-- ============================================================
+-- File Name: memoriavideo.vhd
+-- Megafunction Name(s):
+-- altsyncram
+--
+-- Simulation Library Files(s):
+-- altera_mf
+-- ============================================================
+-- ************************************************************
+-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
+--
+-- 12.1 Build 177 11/07/2012 SJ Web Edition
+-- ************************************************************
+
+
+--Copyright (C) 1991-2012 Altera Corporation
+--Your use of Altera Corporation's design tools, logic functions
+--and other software and tools, and its AMPP partner logic
+--functions, and any output files from any of the foregoing
+--(including device programming or simulation files), and any
+--associated documentation or information are expressly subject
+--to the terms and conditions of the Altera Program License
+--Subscription Agreement, Altera MegaCore Function License
+--Agreement, or other applicable license agreement, including,
+--without limitation, that your use is for the sole purpose of
+--programming logic devices manufactured by Altera and sold by
+--Altera or its authorized distributors. Please refer to the
+--applicable agreement for further details.
+
+
+LIBRARY ieee;
+USE ieee.std_logic_1164.all;
+
+LIBRARY altera_mf;
+USE altera_mf.all;
+
+ENTITY memoriavideo IS
+ PORT
+ (
+ address : IN STD_LOGIC_VECTOR (14 DOWNTO 0);
+ clock : IN STD_LOGIC := '1';
+ q : OUT STD_LOGIC_VECTOR (11 DOWNTO 0)
+ );
+END memoriavideo;
+
+
+ARCHITECTURE SYN OF memoriavideo IS
+
+ SIGNAL sub_wire0 : STD_LOGIC_VECTOR (11 DOWNTO 0);
+
+
+
+ COMPONENT altsyncram
+ GENERIC (
+ address_aclr_a : STRING;
+ clock_enable_input_a : STRING;
+ clock_enable_output_a : STRING;
+ init_file : STRING;
+ intended_device_family : STRING;
+ lpm_hint : STRING;
+ lpm_type : STRING;
+ numwords_a : NATURAL;
+ operation_mode : STRING;
+ outdata_aclr_a : STRING;
+ outdata_reg_a : STRING;
+ widthad_a : NATURAL;
+ width_a : NATURAL;
+ width_byteena_a : NATURAL
+ );
+ PORT (
+ address_a : IN STD_LOGIC_VECTOR (14 DOWNTO 0);
+ clock0 : IN STD_LOGIC ;
+ q_a : OUT STD_LOGIC_VECTOR (11 DOWNTO 0)
+ );
+ END COMPONENT;
+
+BEGIN
+ q <= sub_wire0(11 DOWNTO 0);
+
+ altsyncram_component : altsyncram
+ GENERIC MAP (
+ address_aclr_a => "NONE",
+ clock_enable_input_a => "BYPASS",
+ clock_enable_output_a => "BYPASS",
+ init_file => "DHW.mif",
+ intended_device_family => "Cyclone III",
+ lpm_hint => "ENABLE_RUNTIME_MOD=NO",
+ lpm_type => "altsyncram",
+ numwords_a => 32768,
+ operation_mode => "ROM",
+ outdata_aclr_a => "NONE",
+ outdata_reg_a => "UNREGISTERED",
+ widthad_a => 15,
+ width_a => 12,
+ width_byteena_a => 1
+ )
+ PORT MAP (
+ address_a => address,
+ clock0 => clock,
+ q_a => sub_wire0
+ );
+
+
+
+END SYN;
+
+-- ============================================================
+-- CNX file retrieval info
+-- ============================================================
+-- Retrieval info: PRIVATE: ADDRESSSTALL_A NUMERIC "0"
+-- Retrieval info: PRIVATE: AclrAddr NUMERIC "0"
+-- Retrieval info: PRIVATE: AclrByte NUMERIC "0"
+-- Retrieval info: PRIVATE: AclrOutput NUMERIC "0"
+-- Retrieval info: PRIVATE: BYTE_ENABLE NUMERIC "0"
+-- Retrieval info: PRIVATE: BYTE_SIZE NUMERIC "8"
+-- Retrieval info: PRIVATE: BlankMemory NUMERIC "0"
+-- Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_A NUMERIC "0"
+-- Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_A NUMERIC "0"
+-- Retrieval info: PRIVATE: Clken NUMERIC "0"
+-- Retrieval info: PRIVATE: IMPLEMENT_IN_LES NUMERIC "0"
+-- Retrieval info: PRIVATE: INIT_FILE_LAYOUT STRING "PORT_A"
+-- Retrieval info: PRIVATE: INIT_TO_SIM_X NUMERIC "0"
+-- Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone III"
+-- Retrieval info: PRIVATE: JTAG_ENABLED NUMERIC "0"
+-- Retrieval info: PRIVATE: JTAG_ID STRING "NONE"
+-- Retrieval info: PRIVATE: MAXIMUM_DEPTH NUMERIC "0"
+-- Retrieval info: PRIVATE: MIFfilename STRING "DHW.mif"
+-- Retrieval info: PRIVATE: NUMWORDS_A NUMERIC "32768"
+-- Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC "0"
+-- Retrieval info: PRIVATE: RegAddr NUMERIC "1"
+-- Retrieval info: PRIVATE: RegOutput NUMERIC "0"
+-- Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"
+-- Retrieval info: PRIVATE: SingleClock NUMERIC "1"
+-- Retrieval info: PRIVATE: UseDQRAM NUMERIC "0"
+-- Retrieval info: PRIVATE: WidthAddr NUMERIC "15"
+-- Retrieval info: PRIVATE: WidthData NUMERIC "12"
+-- Retrieval info: PRIVATE: rden NUMERIC "0"
+-- Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
+-- Retrieval info: CONSTANT: ADDRESS_ACLR_A STRING "NONE"
+-- Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_A STRING "BYPASS"
+-- Retrieval info: CONSTANT: CLOCK_ENABLE_OUTPUT_A STRING "BYPASS"
+-- Retrieval info: CONSTANT: INIT_FILE STRING "DHW.mif"
+-- Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone III"
+-- Retrieval info: CONSTANT: LPM_HINT STRING "ENABLE_RUNTIME_MOD=NO"
+-- Retrieval info: CONSTANT: LPM_TYPE STRING "altsyncram"
+-- Retrieval info: CONSTANT: NUMWORDS_A NUMERIC "32768"
+-- Retrieval info: CONSTANT: OPERATION_MODE STRING "ROM"
+-- Retrieval info: CONSTANT: OUTDATA_ACLR_A STRING "NONE"
+-- Retrieval info: CONSTANT: OUTDATA_REG_A STRING "UNREGISTERED"
+-- Retrieval info: CONSTANT: WIDTHAD_A NUMERIC "15"
+-- Retrieval info: CONSTANT: WIDTH_A NUMERIC "12"
+-- Retrieval info: CONSTANT: WIDTH_BYTEENA_A NUMERIC "1"
+-- Retrieval info: USED_PORT: address 0 0 15 0 INPUT NODEFVAL "address[14..0]"
+-- Retrieval info: USED_PORT: clock 0 0 0 0 INPUT VCC "clock"
+-- Retrieval info: USED_PORT: q 0 0 12 0 OUTPUT NODEFVAL "q[11..0]"
+-- Retrieval info: CONNECT: @address_a 0 0 15 0 address 0 0 15 0
+-- Retrieval info: CONNECT: @clock0 0 0 0 0 clock 0 0 0 0
+-- Retrieval info: CONNECT: q 0 0 12 0 @q_a 0 0 12 0
+-- Retrieval info: GEN_FILE: TYPE_NORMAL memoriavideo.vhd TRUE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL memoriavideo.inc FALSE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL memoriavideo.cmp TRUE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL memoriavideo.bsf FALSE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL memoriavideo_inst.vhd TRUE
+-- Retrieval info: LIB_FILE: altera_mf
diff --git a/cMIPS/vhdl/incomplete/vga.vhd b/cMIPS/vhdl/incomplete/vga.vhd
new file mode 100644
index 0000000000000000000000000000000000000000..f336d718b7b7c8ba72d7a3c141cb8102f96e0940
--- /dev/null
+++ b/cMIPS/vhdl/incomplete/vga.vhd
@@ -0,0 +1,212 @@
+
+--++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
+-- VGA controller
+--++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
+library IEEE;
+use IEEE.std_logic_1164.all;
+use IEEE.numeric_std.all;
+use work.p_wires.all;
+
+entity vga is
+ port(rst : in std_logic;
+ clk : in std_logic;
+ VGA_R, VGA_G, VGA_B : out reg4;
+ VGA_HS, VGA_VS : out std_logic);
+end entity vga;
+
+architecture behavioral of vga is
+
+ signal address : reg15;
+ signal address_sig : reg15 := (others => '0');
+ signal Pixels, Linha : reg11;
+ signal RGB, RGB_mem : reg12;
+ signal video_on: std_logic;
+ signal resetn : std_logic;
+
+ component memoriavideo
+ port(address : IN STD_LOGIC_VECTOR (14 DOWNTO 0);
+ clock : IN STD_LOGIC;
+ q : OUT STD_LOGIC_VECTOR (11 DOWNTO 0));
+ end component memoriavideo;
+
+ component VGA_controller
+ port(rst, clk : in std_logic;
+ Video_on_o : out std_logic;
+ Pixels_o, Linha_o : out reg11;
+ VGA_HS_o, VGA_VS_o : out std_logic);
+ end component VGA_controller;
+
+
+begin
+
+ U_memoriavideo : memoriavideo port map (
+ address => address,
+ clock => clk,
+ q => RGB_mem);
+
+ U_sincronismo : sincronismo port map (
+ clk => clk,
+ rst => rst,
+ Video_on_o => Video_on,
+ Pixels_o => Pixels,
+ Linha_o => Linha,
+ VGA_HS_o => VGA_HS,
+ VGA_VS_o => VGA_VS);
+
+ -- Processo que controla as saidas RGB
+ U_VGA_RGB: process (clk, rst)
+ begin
+ if rst = '0' then
+ VGA_R <= "0000";
+ VGA_G <= "0000";
+ VGA_B <= "0000";
+ elsif rising_edge (clk) then
+ if (Video_on = '0') Then
+ VGA_R <= "0000";
+ VGA_G <= "0000";
+ VGA_B <= "0000";
+ else
+ VGA_R <= RGB(11 downto 8);
+ VGA_G <= RGB( 7 downto 4);
+ VGA_B <= RGB( 3 downto 0);
+ end if;
+ end if;
+ end Process VGA_RGB;
+
+
+ -- Enderecamento da memoria
+ Enderecamento: process(Linha, Pixels)
+ begin
+ -- Enviando enderecos para a memoria. O decremento na linha e na coluna
+ -- serve para indicar o endereco correto, pois a imagem esta deslocada
+ Address <= (Linha(6 downto 0)- "0101111") & (Pixels(7 downto 0) - "10111111");
+ -- Nos pixels onde nao tem imagem serao preenchido com a cor azul
+ RGB <= "000001010110";
+ if (Pixels > 191 and Pixels < 446) and (Linha >175 and linha < 302) then
+ -- O numeros definem a regiao onde a imagem sera mostrada
+ -- (a imagem armazenada na memoria eh de 256 x 128)
+ RGB <= RGB_mem;
+ end if;
+ end Process Enderecamento;
+
+
+end behavioral;
+--++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
+
+--++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
+library IEEE;
+use IEEE.std_logic_1164.all;
+use IEEE.numeric_std.all;
+use work.p_wires.all;
+
+entity VGA_controller is
+ Generic(ADDR_WIDTH: integer := 12;
+ DATA_WIDTH: integer := 1);
+ port(signal rst, clk : in std_logic;
+ signal video_on : out std_logic;
+ signal Pixels,Linha : out std_logic_vector(10 downto 0);
+ signal Horiz_sync,Vert_sync : out std_logic);
+end VGA_controller;
+
+architecture behavior of VGA_controller is
+
+ signal cont_x, cont_y: std_logic_vector(10 Downto 0);
+
+ -- valor maximo da variavel cont_x,
+ -- valor encontrado a partir da analise dos tempos do sincronismo horizontal
+ constant H_max : reg11 := CONV_STD_LOGIC_VECTOR(1588,11);
+
+ -- valor maximo da variavel cont_y,
+ -- valor encontrado a partir da analise dos tempos do sincronismo vertical
+ constant V_max : reg11 := CONV_STD_LOGIC_VECTOR(528,11);
+
+ signal video_on_H, video_on_V: std_logic;
+
+begin
+
+ video_on <= video_on_H and video_on_V;
+
+ --Generate Horizontal and Vertical Timing Signals for Video Signal
+ VIDEO_DISPLAY: Process (Clock, Reset)
+ begin
+
+ if rst = '0' then
+ cont_x <= "00000000000";
+ cont_y <= "00000000000";
+ Video_on_H <= '0';
+ Video_on_V <= '0';
+ elsif clk'event and clk = '1' then
+
+ -- cont_x conta os pixels
+ -- (espaco utilizado+espaco nao utilizado +
+ -- tempo extra para o sinal de sincronismo)
+ --
+ -- Contagem de Pixels:
+ -- <-H Sync->
+ -- ------------------------------------__________
+ -- 0 511 -espaco nao utilizado- 1400
+
+
+ if (cont_x >= H_max) then
+ cont_x <= "00000000000";
+ else
+ cont_x <= cont_x + "00000000001";
+ end if;
+
+ -- O Horiz_Sync deve permanecer em nivel logico alto por 27,06 us
+ -- entao em baixo por 3,77 us
+
+
+ if (cont_x <= 1494) and (cont_x >= 1306) then
+ Horiz_Sync <= '0';
+ else
+ Horiz_Sync <= '1';
+ end if;
+
+ -- Ajusta o tempo do Video_on_H
+ if (cont_x <= 1258) then
+ video_on_H <= '1';
+ else
+ video_on_H <= '0';
+ end if;
+
+ -- Contagem de linhas...
+ -- Linha conta as linhas de pixels
+ -- (127 + tempo extra para sinais de sincronismo)
+ --
+ -- <--128 linhas utilizadas --> ->V Sync<-
+ -- -----------------------------------------------_______------------
+ -- 0 127 495-494 528
+ --
+
+ if (cont_y >= V_max) and (cont_x >= 736) then
+ cont_y <= "00000000000";
+ elsif (cont_x = H_Max) then
+ cont_y <= cont_y + "00000000001";
+ end if;
+
+ -- Generate Vertical Sync Signal
+ if (cont_y <= 496) and (cont_y >= 495) then -- (Trocar por (Linha = 494 or linha = 495) ?)
+ Vert_Sync <= '0';
+ else
+ Vert_Sync <= '1';
+ end if;
+
+ -- Ajusta o tempo do Video_on_V
+ if (cont_y <= 479) then
+ video_on_V <= '1';
+ else
+ video_on_V <= '0';
+ end if;
+
+ end if; -- Termina o IF do Reset
+
+ Linha <= cont_y;
+ Pixels <= "0" & cont_x(10 downto 1);
+ -- Usa cont_x descartandando o ultimo bit para dividir por 2 a frequencia
+ -- De forma com que o clock seja semelhante ao do monitor.
+
+ end process VIDEO_DISPLAY;
+
+end behavior;
+
diff --git a/cMIPS/vhdl/io.vhd b/cMIPS/vhdl/io.vhd
index a412013c4c1664d08a51cb49a19f0d812a7c3e70..4d13cd84791d71d0c8277ff9efaccc71ebba64a8 100644
--- a/cMIPS/vhdl/io.vhd
+++ b/cMIPS/vhdl/io.vhd
@@ -57,7 +57,7 @@ begin
data <= x"000000" & std_logic_vector(to_signed(character'pos(this),8));
- -- assert FALSE report "STD_IOrd= " & this;
+ assert TRUE report "STD_IOrd= " & this;
end if;
end process U_READ_IN;
@@ -186,8 +186,7 @@ begin
if addr(3 downto 0) = b"0000" then -- data write
if wr = '0' then
write( output_file, to_integer(signed(data)) );
- -- assert FALSE
- -- report "IOwr[" & SLV32HEX(addr) &"]:"& SLV32HEX(data);
+ assert TRUE report "IOwr[" & SLV32HEX(addr) &"]:" & SLV32HEX(data);
end if;
elsif addr(3 downto 0) = b"0100" then -- close output file
file_close(output_file);
@@ -250,9 +249,8 @@ begin
read( input_file, datum );
data <= std_logic_vector(to_signed(datum, 32));
status <= x"00000000"; -- NOT_EndOfFile
- -- value := std_logic_vector(to_signed(datum, 32)); -- DEBUG
- -- assert FALSE
- -- report "IOrd[" & SLV32HEX(addr) &"]:"& SLV32HEX(value);
+ value := std_logic_vector(to_signed(datum, 32)); -- DEBUG
+ assert TRUE report "IOrd[" & SLV32HEX(addr) &"]:"& SLV32HEX(value);
else
status <= x"00000001"; -- EndOfFile
end if;
@@ -862,7 +860,7 @@ begin
when st_n7 => -- 9
lcd_next_st <= st_n8;
- when st_n8 => -- 10
+ when st_n8 => -- 10, can read now
lcd_next_st <= st_n9;
when st_n9 => -- 11, data hold for Enable is >40ns
lcd_next_st <= st_na;
@@ -916,11 +914,12 @@ begin
when st_nb =>
lcd_enable <= '0'; -- disable, stop waiting
- lcd_read <= '1'; -- hold inp data for 40ns
+ lcd_read <= '1'; -- held inp data for 40ns
waiting <= '0';
when others =>
lcd_enable <= '0'; -- disable
+ lcd_read <= '1';
waiting <= '0';
end case;
end process U_st_outputs;
diff --git a/cMIPS/vhdl/packageMemory_fpga.vhd b/cMIPS/vhdl/packageMemory_fpga.vhd
new file mode 100644
index 0000000000000000000000000000000000000000..c5dac94051f54e3999f5c9433f5a608024d5572c
--- /dev/null
+++ b/cMIPS/vhdl/packageMemory_fpga.vhd
@@ -0,0 +1,348 @@
+-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
+-- cMIPS, a VHDL model of the classical five stage MIPS pipeline.
+-- Copyright (C) 2013 Roberto Andre Hexsel
+--
+-- This program is free software: you can redistribute it and/or modify
+-- it under the terms of the GNU General Public License as published by
+-- the Free Software Foundation, version 3.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+-- GNU General Public License for more details.
+--
+-- You should have received a copy of the GNU General Public License
+-- along with this program. If not, see <http://www.gnu.org/licenses/>.
+-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
+
+library IEEE;
+use IEEE.std_logic_1164.all;
+use IEEE.numeric_std.all;
+use work.p_wires.all;
+
+package p_MEMORY is
+
+ -- To simplify (and accelerate) the RAM address decoding,
+ -- the BASE of the RAM addresses MUST be allocated at an
+ -- address which is at a different power of two than the ROM base.
+ -- Otherwise, the base must be subtracted from the address on every
+ -- reference, which means having an adder in the critical path.
+ -- Not good at all.
+
+ -- The address ranges for ROM, RAM and I/O must be distinct in the
+ -- uppermost 16 bits of the address (bits 31..16).
+ constant HI_SEL_BITS : integer := 31;
+ constant LO_SEL_BITS : integer := 16;
+
+
+ -- x_IO_ADDR_RANGE can have only ONE bit set, thus being a power of 2.
+ -- ACHTUNG: changing that definition may break some of the test programs.
+
+ -- begin DO NOT change these names as several scripts depend on them --
+ -- you may change the values, not names neither formatting --
+ constant x_INST_BASE_ADDR : reg32 := x"00000000";
+ constant x_INST_MEM_SZ : reg32 := x"00002000";
+ constant x_DATA_BASE_ADDR : reg32 := x"00010000";
+ constant x_DATA_MEM_SZ : reg32 := x"00002000";
+ constant x_IO_BASE_ADDR : reg32 := x"3c000000";
+ constant x_IO_MEM_SZ : reg32 := x"00002000";
+ constant x_IO_ADDR_RANGE : reg32 := x"00000020";
+ constant x_SDRAM_BASE_ADDR : reg32 := x"04000000";
+ constant x_SDRAM_MEM_SZ : reg32 := x"02000000";
+ constant x_EXCEPTION_0000 : reg32 := x"00000130"; -- TLBrefill
+ constant x_EXCEPTION_0100 : reg32 := x"00000200"; -- CacheError
+ constant x_EXCEPTION_0180 : reg32 := x"00000280"; -- generalExcpHandler
+ constant x_EXCEPTION_0200 : reg32 := x"00000400"; -- separInterrHandler
+ constant x_EXCEPTION_BFC0 : reg32 := x"000004E0"; -- NMI, soft-reset
+ constant x_ENTRY_POINT : reg32 := x"00000500"; -- main()
+ -- end DO NOT change these names --
+
+
+ constant INST_BASE_ADDR : integer := to_integer(signed(x_INST_BASE_ADDR));
+ constant INST_MEM_SZ : integer := to_integer(signed(x_INST_MEM_SZ));
+ constant INST_ADDRS_BITS : natural := log2_ceil(INST_MEM_SZ);
+
+ constant DATA_BASE_ADDR : integer := to_integer(signed(x_DATA_BASE_ADDR));
+ constant DATA_MEM_SZ : integer := to_integer(signed(x_DATA_MEM_SZ));
+
+ constant SDRAM_BASE_ADDR : integer := to_integer(signed(x_SDRAM_BASE_ADDR));
+ constant SDRAM_MEM_SZ : integer := to_integer(signed(x_SDRAM_MEM_SZ));
+
+ constant IO_BASE_ADDR : integer := to_integer(signed(x_IO_BASE_ADDR));
+ constant IO_MEM_SZ : integer := to_integer(signed(x_IO_MEM_SZ));
+ constant IO_ADDR_RANGE : integer := to_integer(signed(x_IO_ADDR_RANGE));
+
+ -- maximum number of IO devices, must be a power of two.
+ constant IO_MAX_NUM_DEVS : integer := 16;
+
+ constant IO_ADDR_BITS : integer := log2_ceil(IO_MAX_NUM_DEVS * IO_ADDR_RANGE);
+
+ -- I/O addresses are IO_ADDR_RANGE apart
+ constant IO_PRINT_ADDR : integer := IO_BASE_ADDR;
+ constant IO_STDOUT_ADDR : integer := IO_BASE_ADDR + 1*IO_ADDR_RANGE;
+ constant IO_STDIN_ADDR : integer := IO_BASE_ADDR + 2*IO_ADDR_RANGE;
+ constant IO_READ_ADDR : integer := IO_BASE_ADDR + 3*IO_ADDR_RANGE;
+ constant IO_WRITE_ADDR : integer := IO_BASE_ADDR + 4*IO_ADDR_RANGE;
+ constant IO_COUNT_ADDR : integer := IO_BASE_ADDR + 5*IO_ADDR_RANGE;
+ constant IO_FPU_ADDR : integer := IO_BASE_ADDR + 6*IO_ADDR_RANGE;
+ constant IO_UART_ADDR : integer := IO_BASE_ADDR + 7*IO_ADDR_RANGE;
+ constant IO_STATS_ADDR : integer := IO_BASE_ADDR + 8*IO_ADDR_RANGE;
+ constant IO_DSP7SEG_ADDR : integer := IO_BASE_ADDR + 9*IO_ADDR_RANGE;
+ constant IO_KEYBD_ADDR : integer := IO_BASE_ADDR + 10*IO_ADDR_RANGE;
+ constant IO_LCD_ADDR : integer := IO_BASE_ADDR + 11*IO_ADDR_RANGE;
+ constant IO_HIGHEST_ADDR : integer :=
+ IO_BASE_ADDR + (IO_MAX_NUM_DEVS - 1)*IO_ADDR_RANGE;
+
+
+ -- DATA CACHE parameters ================================================
+
+ -- The combination of capacity, associativity and block/line size
+ -- MUST be such that DC_INDEX_BITS >= 6 (64 sets/way)
+ constant DC_TOTAL_CAPACITY : natural := 2*1024;
+ constant DC_NUM_WAYS : natural := 1; -- direct mapped
+ constant DC_VIA_CAPACITY : natural := DC_TOTAL_CAPACITY / DC_NUM_WAYS;
+ constant DC_BTS_PER_WORD : natural := 32;
+ constant DC_BYTES_PER_WORD : natural := 4;
+ constant DC_WORDS_PER_BLOCK : natural := 4;
+ constant DC_NUM_WORDS : natural := DC_VIA_CAPACITY / DC_BYTES_PER_WORD;
+ constant DC_NUM_BLOCKS : natural := DC_NUM_WORDS / DC_WORDS_PER_BLOCK;
+ constant DC_INDEX_BITS : natural := log2_ceil( DC_NUM_BLOCKS );
+ constant DC_WORD_SEL_BITS : natural := log2_ceil( DC_WORDS_PER_BLOCK );
+ constant DC_BYTE_SEL_BITS : natural := log2_ceil( DC_BYTES_PER_WORD );
+
+ -- constants for CONFIG1 cop0 register (Table 8-24 pg 103)
+ constant DC_SETS_PER_WAY: reg3 :=
+ std_logic_vector(to_signed(DC_INDEX_BITS - 6, 3));
+ constant DC_LINE_SIZE: reg3 :=
+ std_logic_vector(to_signed(DC_WORD_SEL_BITS + 1, 3));
+ constant DC_ASSOCIATIVITY: reg3 :=
+ std_logic_vector(to_signed(DC_NUM_WAYS - 1, 3));
+
+
+ -- INSTRUCTION CACHE parameters =========================================
+
+ -- The combination of capacity, associativity and block/line size
+ -- MUST be such that IC_INDEX_BITS >= 6 (64 sets/via)
+ constant IC_TOTAL_CAPACITY : natural := 1024; -- 2*1024;
+ constant IC_NUM_WAYS : natural := 1; -- direct mapped
+ constant IC_VIA_CAPACITY : natural := IC_TOTAL_CAPACITY / IC_NUM_WAYS;
+ constant IC_BTS_PER_WORD : natural := 32;
+ constant IC_BYTES_PER_WORD : natural := 4;
+ constant IC_WORDS_PER_BLOCK : natural := 4;
+ constant IC_NUM_WORDS : natural := IC_VIA_CAPACITY / IC_BYTES_PER_WORD;
+ constant IC_NUM_BLOCKS : natural := IC_NUM_WORDS / IC_WORDS_PER_BLOCK;
+ constant IC_INDEX_BITS : natural := log2_ceil( IC_NUM_BLOCKS );
+ constant IC_WORD_SEL_BITS : natural := log2_ceil( IC_WORDS_PER_BLOCK );
+ constant IC_BYTE_SEL_BITS : natural := log2_ceil( IC_BYTES_PER_WORD );
+
+ -- constants for CONFIG1 cop0 register (Table 8-24 pg 103)
+ constant IC_SETS_PER_WAY: reg3 :=
+ std_logic_vector(to_signed(IC_INDEX_BITS - 6, 3));
+ constant IC_LINE_SIZE: reg3 :=
+ std_logic_vector(to_signed(IC_WORD_SEL_BITS + 1, 3));
+ constant IC_ASSOCIATIVITY: reg3 :=
+ std_logic_vector(to_signed(IC_NUM_WAYS - 1, 3));
+
+ -- constants to access the cache statistics counters
+ constant dcache_Stats_ref : reg3 := "000";
+ constant dcache_Stats_rdhit : reg3 := "001";
+ constant dcache_Stats_wrhit : reg3 := "010";
+ constant dcache_Stats_flush : reg3 := "011";
+ constant icache_Stats_ref : reg3 := "100";
+ constant icache_Stats_hit : reg3 := "101";
+
+
+ -- MMU parameters ========================================================
+
+ -- constants for CONFIG1 cop0 register (Table 8-24 pg 103)
+ constant MMU_CAPACITY : natural := 8;
+ constant MMU_CAPACITY_BITS : natural := log2_ceil( MMU_CAPACITY );
+ constant MMU_SIZE: reg6 :=
+ std_logic_vector(to_signed( (MMU_CAPACITY-1), 6) );
+ constant MMU_WIRED_INIT : reg32 := x"00000000";
+
+ constant VABITS : natural := 32;
+ constant PABITS : natural := 32;
+ constant PAGE_SZ : natural := 4096; -- 4k pages
+ constant PAGE_SZ_BITS : natural := log2_ceil( PAGE_SZ );
+
+ constant PPN_BITS : natural := PABITS - PAGE_SZ_BITS;
+ constant VA_HI_BIT : natural := 31; -- VAaddr in EntryHi 31..PG_size
+ constant VA_LO_BIT : natural := PAGE_SZ_BITS + 1; -- maps 2 phy-pages
+
+ constant ASID_HI_BIT : natural := 7; -- ASID in EntryHi 7..0
+ constant ASID_LO_BIT : natural := 0;
+
+ constant EHI_ASIDLO_BIT : natural := 0;
+ constant EHI_ASIDHI_BIT : natural := 7;
+ constant EHI_G_BIT : natural := 8;
+ constant EHI_ALO_BIT : natural := PAGE_SZ_BITS + 1; -- maps 2 phy-pages
+ constant EHI_AHI_BIT : natural := 31;
+ constant EHI_ZEROS : std_logic_vector(PAGE_SZ_BITS-EHI_G_BIT-1 downto 0) := (others => '0');
+
+ constant TAG_ASIDLO_BIT : natural := 0;
+ constant TAG_ASIDHI_BIT : natural := 7;
+ constant TAG_G_BIT : natural := 8;
+ constant TAG_Z_BIT : natural := 9;
+ constant TAG_ALO_BIT : natural := PAGE_SZ_BITS + 1; -- maps 2 phy-pages
+ constant TAG_AHI_BIT : natural := 31;
+
+ constant ELO_G_BIT : natural := 0;
+ constant ELO_V_BIT : natural := 1;
+ constant ELO_D_BIT : natural := 2;
+ constant ELO_CLO_BIT : natural := 3;
+ constant ELO_CHI_BIT : natural := 5;
+ constant ELO_ALO_BIT : natural := 6;
+ constant ELO_AHI_BIT : natural := ELO_ALO_BIT + PPN_BITS - 1;
+
+ constant DAT_G_BIT : natural := 0;
+ constant DAT_V_BIT : natural := 1;
+ constant DAT_D_BIT : natural := 2;
+ constant DAT_CLO_BIT : natural := 3;
+ constant DAT_CHI_BIT : natural := 5;
+ constant DAT_ALO_BIT : natural := 6;
+ constant DAT_AHI_BIT : natural := DAT_ALO_BIT + PPN_BITS - 1;
+ constant DAT_REG_BITS : natural := DAT_ALO_BIT + PPN_BITS;
+
+ constant ContextPTE_init : reg9 := b"000000000";
+ constant mmu_PageMask : reg32 := x"00001800"; -- pg 68, 4k pages only
+
+ subtype mmu_dat_reg is std_logic_vector (DAT_AHI_BIT downto 0);
+
+ subtype MMU_idx_bits is std_logic_vector(MMU_CAPACITY_BITS-1 downto 0);
+ constant MMU_idx_0s : std_logic_vector(30 downto MMU_CAPACITY_BITS) :=
+ (others => '0');
+ constant MMU_IDX_BIT : natural := 31; -- probe hit=1, miss=0
+
+ -- VA tags map a pair of PHY pages, thus VAddr is 1 bit less than (VABITS-1..PAGE_SZ_BITS)
+ constant tag_zeros : std_logic_vector(PAGE_SZ_BITS downto 0) := (others => '0');
+ constant tag_ones : std_logic_vector(VABITS-1 downto PAGE_SZ_BITS+1) := (others => '1');
+ constant tag_mask : reg32 := tag_ones & tag_zeros;
+ constant tag_g : reg32 := x"00000100";
+
+
+ -- physical addresses for 8 ROM pages
+
+ constant x_ROM_PPN_0 : reg32 := std_logic_vector(to_signed(INST_BASE_ADDR + 0*PAGE_SZ, 32));
+ constant x_ROM_PPN_1 : reg32 := std_logic_vector(to_signed(INST_BASE_ADDR + 1*PAGE_SZ, 32));
+ constant x_ROM_PPN_2 : reg32 := std_logic_vector(to_signed(INST_BASE_ADDR + 2*PAGE_SZ, 32));
+ constant x_ROM_PPN_3 : reg32 := std_logic_vector(to_signed(INST_BASE_ADDR + 3*PAGE_SZ, 32));
+ constant x_ROM_PPN_4 : reg32 := std_logic_vector(to_signed(INST_BASE_ADDR + 4*PAGE_SZ, 32));
+ constant x_ROM_PPN_5 : reg32 := std_logic_vector(to_signed(INST_BASE_ADDR + 5*PAGE_SZ, 32));
+ constant x_ROM_PPN_6 : reg32 := std_logic_vector(to_signed(INST_BASE_ADDR + 6*PAGE_SZ, 32));
+ constant x_ROM_PPN_7 : reg32 := std_logic_vector(to_signed(INST_BASE_ADDR + 7*PAGE_SZ, 32));
+
+ constant MMU_ini_tag_ROM0 : reg32 := (x_ROM_PPN_0 and tag_mask) or tag_g;
+ constant MMU_ini_dat_ROM0 : mmu_dat_reg :=
+ x_ROM_PPN_0(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+ constant MMU_ini_dat_ROM1 : mmu_dat_reg :=
+ x_ROM_PPN_1(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+
+ constant MMU_ini_tag_ROM2 : reg32 := (x_ROM_PPN_2 and tag_mask) or tag_g;
+ constant MMU_ini_dat_ROM2 : mmu_dat_reg :=
+ x_ROM_PPN_2(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+ constant MMU_ini_dat_ROM3 : mmu_dat_reg :=
+ x_ROM_PPN_3(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+
+ constant MMU_ini_tag_ROM4 : reg32 := (x_ROM_PPN_4 and tag_mask) or tag_g;
+ constant MMU_ini_dat_ROM4 : mmu_dat_reg :=
+ x_ROM_PPN_4(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+ constant MMU_ini_dat_ROM5 : mmu_dat_reg :=
+ x_ROM_PPN_5(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+
+ constant MMU_ini_tag_ROM6 : reg32 := (x_ROM_PPN_6 and tag_mask) or tag_g;
+ constant MMU_ini_dat_ROM6 : mmu_dat_reg :=
+ x_ROM_PPN_6(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+ constant MMU_ini_dat_ROM7 : mmu_dat_reg :=
+ x_ROM_PPN_7(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+
+
+ -- physical addresses for 8 RAM pages
+
+ constant x_RAM_PPN_0 : reg32 := std_logic_vector(to_signed(DATA_BASE_ADDR + 0*PAGE_SZ, 32));
+ constant x_RAM_PPN_1 : reg32 := std_logic_vector(to_signed(DATA_BASE_ADDR + 1*PAGE_SZ, 32));
+ constant x_RAM_PPN_2 : reg32 := std_logic_vector(to_signed(DATA_BASE_ADDR + 2*PAGE_SZ, 32));
+ constant x_RAM_PPN_3 : reg32 := std_logic_vector(to_signed(DATA_BASE_ADDR + 3*PAGE_SZ, 32));
+ constant x_RAM_PPN_4 : reg32 := std_logic_vector(to_signed(DATA_BASE_ADDR + 4*PAGE_SZ, 32));
+ constant x_RAM_PPN_5 : reg32 := std_logic_vector(to_signed(DATA_BASE_ADDR + 5*PAGE_SZ, 32));
+ constant x_RAM_PPN_6 : reg32 := std_logic_vector(to_signed(DATA_BASE_ADDR + 6*PAGE_SZ, 32));
+ constant x_RAM_PPN_7 : reg32 := std_logic_vector(to_signed(DATA_BASE_ADDR + 7*PAGE_SZ, 32));
+
+ constant MMU_ini_tag_RAM0 : reg32 := (x_RAM_PPN_0 and tag_mask) or tag_g;
+ constant MMU_ini_dat_RAM0 : mmu_dat_reg :=
+ x_RAM_PPN_0(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+ constant MMU_ini_dat_RAM1 : mmu_dat_reg :=
+ x_RAM_PPN_1(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+
+ constant MMU_ini_tag_RAM2 : reg32 := (x_RAM_PPN_2 and tag_mask) or tag_g;
+ constant MMU_ini_dat_RAM2 : mmu_dat_reg :=
+ x_RAM_PPN_2(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+ constant MMU_ini_dat_RAM3 : mmu_dat_reg :=
+ x_RAM_PPN_3(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+
+ constant MMU_ini_tag_RAM4 : reg32 := (x_RAM_PPN_4 and tag_mask) or tag_g;
+ constant MMU_ini_dat_RAM4 : mmu_dat_reg :=
+ x_RAM_PPN_4(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+ constant MMU_ini_dat_RAM5 : mmu_dat_reg :=
+ x_RAM_PPN_5(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+
+ constant MMU_ini_tag_RAM6 : reg32 := (x_RAM_PPN_6 and tag_mask) or tag_g;
+ constant MMU_ini_dat_RAM6 : mmu_dat_reg :=
+ x_RAM_PPN_6(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+ constant MMU_ini_dat_RAM7 : mmu_dat_reg :=
+ x_RAM_PPN_7(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+
+
+ -- physical addresses for 2 pages reserved for I/O devices
+
+ constant x_IO_PPN_0 : reg32 := std_logic_vector(to_signed(IO_BASE_ADDR + 0*PAGE_SZ, 32));
+ constant x_IO_PPN_1 : reg32 := std_logic_vector(to_signed(IO_BASE_ADDR + 1*PAGE_SZ, 32));
+
+ constant MMU_ini_tag_IO : reg32 := (x_IO_BASE_ADDR and tag_mask) or tag_g;
+ constant MMU_ini_dat_IO0 : mmu_dat_reg :=
+ x_IO_PPN_0(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+ constant MMU_ini_dat_IO1 : mmu_dat_reg :=
+ x_IO_PPN_1(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+
+
+ -- physical addresses for 8 SDRAM pages
+
+ constant x_SDRAM_PPN_0 : reg32 := std_logic_vector(to_signed(SDRAM_BASE_ADDR + 0*PAGE_SZ, 32));
+ constant x_SDRAM_PPN_1 : reg32 := std_logic_vector(to_signed(SDRAM_BASE_ADDR + 1*PAGE_SZ, 32));
+ constant x_SDRAM_PPN_2 : reg32 := std_logic_vector(to_signed(SDRAM_BASE_ADDR + 2*PAGE_SZ, 32));
+ constant x_SDRAM_PPN_3 : reg32 := std_logic_vector(to_signed(SDRAM_BASE_ADDR + 3*PAGE_SZ, 32));
+ constant x_SDRAM_PPN_4 : reg32 := std_logic_vector(to_signed(SDRAM_BASE_ADDR + 4*PAGE_SZ, 32));
+ constant x_SDRAM_PPN_5 : reg32 := std_logic_vector(to_signed(SDRAM_BASE_ADDR + 5*PAGE_SZ, 32));
+ constant x_SDRAM_PPN_6 : reg32 := std_logic_vector(to_signed(SDRAM_BASE_ADDR + 6*PAGE_SZ, 32));
+ constant x_SDRAM_PPN_7 : reg32 := std_logic_vector(to_signed(SDRAM_BASE_ADDR + 7*PAGE_SZ, 32));
+
+ constant MMU_ini_tag_SDR0 : reg32 := (x_SDRAM_PPN_0 and tag_mask) or tag_g;
+ constant MMU_ini_dat_SDR0 : mmu_dat_reg :=
+ x_SDRAM_PPN_0(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+ constant MMU_ini_dat_SDR1 : mmu_dat_reg :=
+ x_SDRAM_PPN_1(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+
+ constant MMU_ini_tag_SDR2 : reg32 := (x_SDRAM_PPN_2 and tag_mask) or tag_g;
+ constant MMU_ini_dat_SDR2 : mmu_dat_reg :=
+ x_SDRAM_PPN_2(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+ constant MMU_ini_dat_SDR3 : mmu_dat_reg :=
+ x_SDRAM_PPN_3(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+
+ constant MMU_ini_tag_SDR4 : reg32 := (x_SDRAM_PPN_4 and tag_mask) or tag_g;
+ constant MMU_ini_dat_SDR4 : mmu_dat_reg :=
+ x_SDRAM_PPN_4(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+ constant MMU_ini_dat_SDR5 : mmu_dat_reg :=
+ x_SDRAM_PPN_5(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+
+ constant MMU_ini_tag_SDR6 : reg32 := (x_SDRAM_PPN_6 and tag_mask) or tag_g;
+ constant MMU_ini_dat_SDR6 : mmu_dat_reg :=
+ x_SDRAM_PPN_6(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+ constant MMU_ini_dat_SDR7 : mmu_dat_reg :=
+ x_SDRAM_PPN_7(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+
+
+end p_MEMORY;
+
+-- package body p_MEMORY is
+-- end p_MEMORY;
+-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
diff --git a/cMIPS/vhdl/packageMemory_simu.vhd b/cMIPS/vhdl/packageMemory_simu.vhd
new file mode 100644
index 0000000000000000000000000000000000000000..03f894c68e2cb3f42216252a0cfe5c509c958d50
--- /dev/null
+++ b/cMIPS/vhdl/packageMemory_simu.vhd
@@ -0,0 +1,348 @@
+-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
+-- cMIPS, a VHDL model of the classical five stage MIPS pipeline.
+-- Copyright (C) 2013 Roberto Andre Hexsel
+--
+-- This program is free software: you can redistribute it and/or modify
+-- it under the terms of the GNU General Public License as published by
+-- the Free Software Foundation, version 3.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+-- GNU General Public License for more details.
+--
+-- You should have received a copy of the GNU General Public License
+-- along with this program. If not, see <http://www.gnu.org/licenses/>.
+-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
+
+library IEEE;
+use IEEE.std_logic_1164.all;
+use IEEE.numeric_std.all;
+use work.p_wires.all;
+
+package p_MEMORY is
+
+ -- To simplify (and accelerate) the RAM address decoding,
+ -- the BASE of the RAM addresses MUST be allocated at an
+ -- address which is at a different power of two than the ROM base.
+ -- Otherwise, the base must be subtracted from the address on every
+ -- reference, which means having an adder in the critical path.
+ -- Not good at all.
+
+ -- The address ranges for ROM, RAM and I/O must be distinct in the
+ -- uppermost 16 bits of the address (bits 31..16).
+ constant HI_SEL_BITS : integer := 31;
+ constant LO_SEL_BITS : integer := 16;
+
+
+ -- x_IO_ADDR_RANGE can have only ONE bit set, thus being a power of 2.
+ -- ACHTUNG: changing that definition may break some of the test programs.
+
+ -- begin DO NOT change these names as several scripts depend on them --
+ -- you may change the values, not names neither formatting --
+ constant x_INST_BASE_ADDR : reg32 := x"00000000";
+ constant x_INST_MEM_SZ : reg32 := x"00004000";
+ constant x_DATA_BASE_ADDR : reg32 := x"00040000";
+ constant x_DATA_MEM_SZ : reg32 := x"00020000";
+ constant x_IO_BASE_ADDR : reg32 := x"3c000000";
+ constant x_IO_MEM_SZ : reg32 := x"00002000";
+ constant x_IO_ADDR_RANGE : reg32 := x"00000020";
+ constant x_SDRAM_BASE_ADDR : reg32 := x"04000000";
+ constant x_SDRAM_MEM_SZ : reg32 := x"02000000";
+ constant x_EXCEPTION_0000 : reg32 := x"00000130"; -- TLBrefill
+ constant x_EXCEPTION_0100 : reg32 := x"00000200"; -- CacheError
+ constant x_EXCEPTION_0180 : reg32 := x"00000280"; -- generalExcpHandler
+ constant x_EXCEPTION_0200 : reg32 := x"00000400"; -- separInterrHandler
+ constant x_EXCEPTION_BFC0 : reg32 := x"000004E0"; -- NMI, soft-reset
+ constant x_ENTRY_POINT : reg32 := x"00000500"; -- main()
+ -- end DO NOT change these names --
+
+
+ constant INST_BASE_ADDR : integer := to_integer(signed(x_INST_BASE_ADDR));
+ constant INST_MEM_SZ : integer := to_integer(signed(x_INST_MEM_SZ));
+ constant INST_ADDRS_BITS : natural := log2_ceil(INST_MEM_SZ);
+
+ constant DATA_BASE_ADDR : integer := to_integer(signed(x_DATA_BASE_ADDR));
+ constant DATA_MEM_SZ : integer := to_integer(signed(x_DATA_MEM_SZ));
+
+ constant SDRAM_BASE_ADDR : integer := to_integer(signed(x_SDRAM_BASE_ADDR));
+ constant SDRAM_MEM_SZ : integer := to_integer(signed(x_SDRAM_MEM_SZ));
+
+ constant IO_BASE_ADDR : integer := to_integer(signed(x_IO_BASE_ADDR));
+ constant IO_MEM_SZ : integer := to_integer(signed(x_IO_MEM_SZ));
+ constant IO_ADDR_RANGE : integer := to_integer(signed(x_IO_ADDR_RANGE));
+
+ -- maximum number of IO devices, must be a power of two.
+ constant IO_MAX_NUM_DEVS : integer := 16;
+
+ constant IO_ADDR_BITS : integer := log2_ceil(IO_MAX_NUM_DEVS * IO_ADDR_RANGE);
+
+ -- I/O addresses are IO_ADDR_RANGE apart
+ constant IO_PRINT_ADDR : integer := IO_BASE_ADDR;
+ constant IO_STDOUT_ADDR : integer := IO_BASE_ADDR + 1*IO_ADDR_RANGE;
+ constant IO_STDIN_ADDR : integer := IO_BASE_ADDR + 2*IO_ADDR_RANGE;
+ constant IO_READ_ADDR : integer := IO_BASE_ADDR + 3*IO_ADDR_RANGE;
+ constant IO_WRITE_ADDR : integer := IO_BASE_ADDR + 4*IO_ADDR_RANGE;
+ constant IO_COUNT_ADDR : integer := IO_BASE_ADDR + 5*IO_ADDR_RANGE;
+ constant IO_FPU_ADDR : integer := IO_BASE_ADDR + 6*IO_ADDR_RANGE;
+ constant IO_UART_ADDR : integer := IO_BASE_ADDR + 7*IO_ADDR_RANGE;
+ constant IO_STATS_ADDR : integer := IO_BASE_ADDR + 8*IO_ADDR_RANGE;
+ constant IO_DSP7SEG_ADDR : integer := IO_BASE_ADDR + 9*IO_ADDR_RANGE;
+ constant IO_KEYBD_ADDR : integer := IO_BASE_ADDR + 10*IO_ADDR_RANGE;
+ constant IO_LCD_ADDR : integer := IO_BASE_ADDR + 11*IO_ADDR_RANGE;
+ constant IO_HIGHEST_ADDR : integer :=
+ IO_BASE_ADDR + (IO_MAX_NUM_DEVS - 1)*IO_ADDR_RANGE;
+
+
+ -- DATA CACHE parameters ================================================
+
+ -- The combination of capacity, associativity and block/line size
+ -- MUST be such that DC_INDEX_BITS >= 6 (64 sets/way)
+ constant DC_TOTAL_CAPACITY : natural := 2*1024;
+ constant DC_NUM_WAYS : natural := 1; -- direct mapped
+ constant DC_VIA_CAPACITY : natural := DC_TOTAL_CAPACITY / DC_NUM_WAYS;
+ constant DC_BTS_PER_WORD : natural := 32;
+ constant DC_BYTES_PER_WORD : natural := 4;
+ constant DC_WORDS_PER_BLOCK : natural := 4;
+ constant DC_NUM_WORDS : natural := DC_VIA_CAPACITY / DC_BYTES_PER_WORD;
+ constant DC_NUM_BLOCKS : natural := DC_NUM_WORDS / DC_WORDS_PER_BLOCK;
+ constant DC_INDEX_BITS : natural := log2_ceil( DC_NUM_BLOCKS );
+ constant DC_WORD_SEL_BITS : natural := log2_ceil( DC_WORDS_PER_BLOCK );
+ constant DC_BYTE_SEL_BITS : natural := log2_ceil( DC_BYTES_PER_WORD );
+
+ -- constants for CONFIG1 cop0 register (Table 8-24 pg 103)
+ constant DC_SETS_PER_WAY: reg3 :=
+ std_logic_vector(to_signed(DC_INDEX_BITS - 6, 3));
+ constant DC_LINE_SIZE: reg3 :=
+ std_logic_vector(to_signed(DC_WORD_SEL_BITS + 1, 3));
+ constant DC_ASSOCIATIVITY: reg3 :=
+ std_logic_vector(to_signed(DC_NUM_WAYS - 1, 3));
+
+
+ -- INSTRUCTION CACHE parameters =========================================
+
+ -- The combination of capacity, associativity and block/line size
+ -- MUST be such that IC_INDEX_BITS >= 6 (64 sets/via)
+ constant IC_TOTAL_CAPACITY : natural := 1024; -- 2*1024;
+ constant IC_NUM_WAYS : natural := 1; -- direct mapped
+ constant IC_VIA_CAPACITY : natural := IC_TOTAL_CAPACITY / IC_NUM_WAYS;
+ constant IC_BTS_PER_WORD : natural := 32;
+ constant IC_BYTES_PER_WORD : natural := 4;
+ constant IC_WORDS_PER_BLOCK : natural := 4;
+ constant IC_NUM_WORDS : natural := IC_VIA_CAPACITY / IC_BYTES_PER_WORD;
+ constant IC_NUM_BLOCKS : natural := IC_NUM_WORDS / IC_WORDS_PER_BLOCK;
+ constant IC_INDEX_BITS : natural := log2_ceil( IC_NUM_BLOCKS );
+ constant IC_WORD_SEL_BITS : natural := log2_ceil( IC_WORDS_PER_BLOCK );
+ constant IC_BYTE_SEL_BITS : natural := log2_ceil( IC_BYTES_PER_WORD );
+
+ -- constants for CONFIG1 cop0 register (Table 8-24 pg 103)
+ constant IC_SETS_PER_WAY: reg3 :=
+ std_logic_vector(to_signed(IC_INDEX_BITS - 6, 3));
+ constant IC_LINE_SIZE: reg3 :=
+ std_logic_vector(to_signed(IC_WORD_SEL_BITS + 1, 3));
+ constant IC_ASSOCIATIVITY: reg3 :=
+ std_logic_vector(to_signed(IC_NUM_WAYS - 1, 3));
+
+ -- constants to access the cache statistics counters
+ constant dcache_Stats_ref : reg3 := "000";
+ constant dcache_Stats_rdhit : reg3 := "001";
+ constant dcache_Stats_wrhit : reg3 := "010";
+ constant dcache_Stats_flush : reg3 := "011";
+ constant icache_Stats_ref : reg3 := "100";
+ constant icache_Stats_hit : reg3 := "101";
+
+
+ -- MMU parameters ========================================================
+
+ -- constants for CONFIG1 cop0 register (Table 8-24 pg 103)
+ constant MMU_CAPACITY : natural := 8;
+ constant MMU_CAPACITY_BITS : natural := log2_ceil( MMU_CAPACITY );
+ constant MMU_SIZE: reg6 :=
+ std_logic_vector(to_signed( (MMU_CAPACITY-1), 6) );
+ constant MMU_WIRED_INIT : reg32 := x"00000000";
+
+ constant VABITS : natural := 32;
+ constant PABITS : natural := 32;
+ constant PAGE_SZ : natural := 4096; -- 4k pages
+ constant PAGE_SZ_BITS : natural := log2_ceil( PAGE_SZ );
+
+ constant PPN_BITS : natural := PABITS - PAGE_SZ_BITS;
+ constant VA_HI_BIT : natural := 31; -- VAaddr in EntryHi 31..PG_size
+ constant VA_LO_BIT : natural := PAGE_SZ_BITS + 1; -- maps 2 phy-pages
+
+ constant ASID_HI_BIT : natural := 7; -- ASID in EntryHi 7..0
+ constant ASID_LO_BIT : natural := 0;
+
+ constant EHI_ASIDLO_BIT : natural := 0;
+ constant EHI_ASIDHI_BIT : natural := 7;
+ constant EHI_G_BIT : natural := 8;
+ constant EHI_ALO_BIT : natural := PAGE_SZ_BITS + 1; -- maps 2 phy-pages
+ constant EHI_AHI_BIT : natural := 31;
+ constant EHI_ZEROS : std_logic_vector(PAGE_SZ_BITS-EHI_G_BIT-1 downto 0) := (others => '0');
+
+ constant TAG_ASIDLO_BIT : natural := 0;
+ constant TAG_ASIDHI_BIT : natural := 7;
+ constant TAG_G_BIT : natural := 8;
+ constant TAG_Z_BIT : natural := 9;
+ constant TAG_ALO_BIT : natural := PAGE_SZ_BITS + 1; -- maps 2 phy-pages
+ constant TAG_AHI_BIT : natural := 31;
+
+ constant ELO_G_BIT : natural := 0;
+ constant ELO_V_BIT : natural := 1;
+ constant ELO_D_BIT : natural := 2;
+ constant ELO_CLO_BIT : natural := 3;
+ constant ELO_CHI_BIT : natural := 5;
+ constant ELO_ALO_BIT : natural := 6;
+ constant ELO_AHI_BIT : natural := ELO_ALO_BIT + PPN_BITS - 1;
+
+ constant DAT_G_BIT : natural := 0;
+ constant DAT_V_BIT : natural := 1;
+ constant DAT_D_BIT : natural := 2;
+ constant DAT_CLO_BIT : natural := 3;
+ constant DAT_CHI_BIT : natural := 5;
+ constant DAT_ALO_BIT : natural := 6;
+ constant DAT_AHI_BIT : natural := DAT_ALO_BIT + PPN_BITS - 1;
+ constant DAT_REG_BITS : natural := DAT_ALO_BIT + PPN_BITS;
+
+ constant ContextPTE_init : reg9 := b"000000000";
+ constant mmu_PageMask : reg32 := x"00001800"; -- pg 68, 4k pages only
+
+ subtype mmu_dat_reg is std_logic_vector (DAT_AHI_BIT downto 0);
+
+ subtype MMU_idx_bits is std_logic_vector(MMU_CAPACITY_BITS-1 downto 0);
+ constant MMU_idx_0s : std_logic_vector(30 downto MMU_CAPACITY_BITS) :=
+ (others => '0');
+ constant MMU_IDX_BIT : natural := 31; -- probe hit=1, miss=0
+
+ -- VA tags map a pair of PHY pages, thus VAddr is 1 bit less than (VABITS-1..PAGE_SZ_BITS)
+ constant tag_zeros : std_logic_vector(PAGE_SZ_BITS downto 0) := (others => '0');
+ constant tag_ones : std_logic_vector(VABITS-1 downto PAGE_SZ_BITS+1) := (others => '1');
+ constant tag_mask : reg32 := tag_ones & tag_zeros;
+ constant tag_g : reg32 := x"00000100";
+
+
+ -- physical addresses for 8 ROM pages
+
+ constant x_ROM_PPN_0 : reg32 := std_logic_vector(to_signed(INST_BASE_ADDR + 0*PAGE_SZ, 32));
+ constant x_ROM_PPN_1 : reg32 := std_logic_vector(to_signed(INST_BASE_ADDR + 1*PAGE_SZ, 32));
+ constant x_ROM_PPN_2 : reg32 := std_logic_vector(to_signed(INST_BASE_ADDR + 2*PAGE_SZ, 32));
+ constant x_ROM_PPN_3 : reg32 := std_logic_vector(to_signed(INST_BASE_ADDR + 3*PAGE_SZ, 32));
+ constant x_ROM_PPN_4 : reg32 := std_logic_vector(to_signed(INST_BASE_ADDR + 4*PAGE_SZ, 32));
+ constant x_ROM_PPN_5 : reg32 := std_logic_vector(to_signed(INST_BASE_ADDR + 5*PAGE_SZ, 32));
+ constant x_ROM_PPN_6 : reg32 := std_logic_vector(to_signed(INST_BASE_ADDR + 6*PAGE_SZ, 32));
+ constant x_ROM_PPN_7 : reg32 := std_logic_vector(to_signed(INST_BASE_ADDR + 7*PAGE_SZ, 32));
+
+ constant MMU_ini_tag_ROM0 : reg32 := (x_ROM_PPN_0 and tag_mask) or tag_g;
+ constant MMU_ini_dat_ROM0 : mmu_dat_reg :=
+ x_ROM_PPN_0(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+ constant MMU_ini_dat_ROM1 : mmu_dat_reg :=
+ x_ROM_PPN_1(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+
+ constant MMU_ini_tag_ROM2 : reg32 := (x_ROM_PPN_2 and tag_mask) or tag_g;
+ constant MMU_ini_dat_ROM2 : mmu_dat_reg :=
+ x_ROM_PPN_2(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+ constant MMU_ini_dat_ROM3 : mmu_dat_reg :=
+ x_ROM_PPN_3(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+
+ constant MMU_ini_tag_ROM4 : reg32 := (x_ROM_PPN_4 and tag_mask) or tag_g;
+ constant MMU_ini_dat_ROM4 : mmu_dat_reg :=
+ x_ROM_PPN_4(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+ constant MMU_ini_dat_ROM5 : mmu_dat_reg :=
+ x_ROM_PPN_5(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+
+ constant MMU_ini_tag_ROM6 : reg32 := (x_ROM_PPN_6 and tag_mask) or tag_g;
+ constant MMU_ini_dat_ROM6 : mmu_dat_reg :=
+ x_ROM_PPN_6(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+ constant MMU_ini_dat_ROM7 : mmu_dat_reg :=
+ x_ROM_PPN_7(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+
+
+ -- physical addresses for 8 RAM pages
+
+ constant x_RAM_PPN_0 : reg32 := std_logic_vector(to_signed(DATA_BASE_ADDR + 0*PAGE_SZ, 32));
+ constant x_RAM_PPN_1 : reg32 := std_logic_vector(to_signed(DATA_BASE_ADDR + 1*PAGE_SZ, 32));
+ constant x_RAM_PPN_2 : reg32 := std_logic_vector(to_signed(DATA_BASE_ADDR + 2*PAGE_SZ, 32));
+ constant x_RAM_PPN_3 : reg32 := std_logic_vector(to_signed(DATA_BASE_ADDR + 3*PAGE_SZ, 32));
+ constant x_RAM_PPN_4 : reg32 := std_logic_vector(to_signed(DATA_BASE_ADDR + 4*PAGE_SZ, 32));
+ constant x_RAM_PPN_5 : reg32 := std_logic_vector(to_signed(DATA_BASE_ADDR + 5*PAGE_SZ, 32));
+ constant x_RAM_PPN_6 : reg32 := std_logic_vector(to_signed(DATA_BASE_ADDR + 6*PAGE_SZ, 32));
+ constant x_RAM_PPN_7 : reg32 := std_logic_vector(to_signed(DATA_BASE_ADDR + 7*PAGE_SZ, 32));
+
+ constant MMU_ini_tag_RAM0 : reg32 := (x_RAM_PPN_0 and tag_mask) or tag_g;
+ constant MMU_ini_dat_RAM0 : mmu_dat_reg :=
+ x_RAM_PPN_0(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+ constant MMU_ini_dat_RAM1 : mmu_dat_reg :=
+ x_RAM_PPN_1(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+
+ constant MMU_ini_tag_RAM2 : reg32 := (x_RAM_PPN_2 and tag_mask) or tag_g;
+ constant MMU_ini_dat_RAM2 : mmu_dat_reg :=
+ x_RAM_PPN_2(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+ constant MMU_ini_dat_RAM3 : mmu_dat_reg :=
+ x_RAM_PPN_3(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+
+ constant MMU_ini_tag_RAM4 : reg32 := (x_RAM_PPN_4 and tag_mask) or tag_g;
+ constant MMU_ini_dat_RAM4 : mmu_dat_reg :=
+ x_RAM_PPN_4(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+ constant MMU_ini_dat_RAM5 : mmu_dat_reg :=
+ x_RAM_PPN_5(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+
+ constant MMU_ini_tag_RAM6 : reg32 := (x_RAM_PPN_6 and tag_mask) or tag_g;
+ constant MMU_ini_dat_RAM6 : mmu_dat_reg :=
+ x_RAM_PPN_6(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+ constant MMU_ini_dat_RAM7 : mmu_dat_reg :=
+ x_RAM_PPN_7(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+
+
+ -- physical addresses for 2 pages reserved for I/O devices
+
+ constant x_IO_PPN_0 : reg32 := std_logic_vector(to_signed(IO_BASE_ADDR + 0*PAGE_SZ, 32));
+ constant x_IO_PPN_1 : reg32 := std_logic_vector(to_signed(IO_BASE_ADDR + 1*PAGE_SZ, 32));
+
+ constant MMU_ini_tag_IO : reg32 := (x_IO_BASE_ADDR and tag_mask) or tag_g;
+ constant MMU_ini_dat_IO0 : mmu_dat_reg :=
+ x_IO_PPN_0(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+ constant MMU_ini_dat_IO1 : mmu_dat_reg :=
+ x_IO_PPN_1(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+
+
+ -- physical addresses for 8 SDRAM pages
+
+ constant x_SDRAM_PPN_0 : reg32 := std_logic_vector(to_signed(SDRAM_BASE_ADDR + 0*PAGE_SZ, 32));
+ constant x_SDRAM_PPN_1 : reg32 := std_logic_vector(to_signed(SDRAM_BASE_ADDR + 1*PAGE_SZ, 32));
+ constant x_SDRAM_PPN_2 : reg32 := std_logic_vector(to_signed(SDRAM_BASE_ADDR + 2*PAGE_SZ, 32));
+ constant x_SDRAM_PPN_3 : reg32 := std_logic_vector(to_signed(SDRAM_BASE_ADDR + 3*PAGE_SZ, 32));
+ constant x_SDRAM_PPN_4 : reg32 := std_logic_vector(to_signed(SDRAM_BASE_ADDR + 4*PAGE_SZ, 32));
+ constant x_SDRAM_PPN_5 : reg32 := std_logic_vector(to_signed(SDRAM_BASE_ADDR + 5*PAGE_SZ, 32));
+ constant x_SDRAM_PPN_6 : reg32 := std_logic_vector(to_signed(SDRAM_BASE_ADDR + 6*PAGE_SZ, 32));
+ constant x_SDRAM_PPN_7 : reg32 := std_logic_vector(to_signed(SDRAM_BASE_ADDR + 7*PAGE_SZ, 32));
+
+ constant MMU_ini_tag_SDR0 : reg32 := (x_SDRAM_PPN_0 and tag_mask) or tag_g;
+ constant MMU_ini_dat_SDR0 : mmu_dat_reg :=
+ x_SDRAM_PPN_0(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+ constant MMU_ini_dat_SDR1 : mmu_dat_reg :=
+ x_SDRAM_PPN_1(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+
+ constant MMU_ini_tag_SDR2 : reg32 := (x_SDRAM_PPN_2 and tag_mask) or tag_g;
+ constant MMU_ini_dat_SDR2 : mmu_dat_reg :=
+ x_SDRAM_PPN_2(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+ constant MMU_ini_dat_SDR3 : mmu_dat_reg :=
+ x_SDRAM_PPN_3(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+
+ constant MMU_ini_tag_SDR4 : reg32 := (x_SDRAM_PPN_4 and tag_mask) or tag_g;
+ constant MMU_ini_dat_SDR4 : mmu_dat_reg :=
+ x_SDRAM_PPN_4(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+ constant MMU_ini_dat_SDR5 : mmu_dat_reg :=
+ x_SDRAM_PPN_5(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+
+ constant MMU_ini_tag_SDR6 : reg32 := (x_SDRAM_PPN_6 and tag_mask) or tag_g;
+ constant MMU_ini_dat_SDR6 : mmu_dat_reg :=
+ x_SDRAM_PPN_6(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+ constant MMU_ini_dat_SDR7 : mmu_dat_reg :=
+ x_SDRAM_PPN_7(PABITS-1 downto PAGE_SZ_BITS) & b"000111"; -- d,v,g=1
+
+
+end p_MEMORY;
+
+-- package body p_MEMORY is
+-- end p_MEMORY;
+-- ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
diff --git a/cMIPS/vhdl/packageWires.vhd b/cMIPS/vhdl/packageWires.vhd
index d0e3ba4eedee8e6163ba3a9850ab6b106cbd8a22..5fc4c2b67bda4c448a464b4e5bbbbc9c6ae00e10 100644
--- a/cMIPS/vhdl/packageWires.vhd
+++ b/cMIPS/vhdl/packageWires.vhd
@@ -48,6 +48,7 @@ package p_WIRES is
subtype reg8 is std_logic_vector(7 downto 0);
subtype reg9 is std_logic_vector(8 downto 0);
subtype reg10 is std_logic_vector(9 downto 0);
+ subtype reg11 is std_logic_vector(10 downto 0);
subtype reg12 is std_logic_vector(11 downto 0);
subtype reg13 is std_logic_vector(12 downto 0);
subtype reg16 is std_logic_vector(15 downto 0);
diff --git a/cMIPS/vhdl/ram.vhd b/cMIPS/vhdl/ram.vhd
index fc40895b8f03e909cbc4db2ded482d2afbc5bd6f..009a00e9a6069b6100b155891a96999b34bba0af 100644
--- a/cMIPS/vhdl/ram.vhd
+++ b/cMIPS/vhdl/ram.vhd
@@ -176,8 +176,8 @@ begin -- rtl
di <= (others => 'X');
end case;
- -- assert false report "ramWR["& natural'image(r_addr) &"] "
- -- & SLV32HEX(data_out) &" bySel=" & SLV2STR(byte_sel); -- DEBUG
+ assert TRUE report "ramWR["& natural'image(r_addr) &"] "
+ & SLV32HEX(data_inp) &" bySel=" & SLV2STR(byte_sel); -- DEBUG
data_out <= (others => 'X');
@@ -199,8 +199,8 @@ begin -- rtl
data_out(15 downto 8) <= do(15 downto 8);
data_out(7 downto 0) <= do(7 downto 0);
- -- assert false report "ramRD["& natural'image(r_addr) &"] "
- -- & SLV32HEX(do) &" bySel="& SLV2STR(byte_sel); -- DEBUG
+ assert TRUE report "ramRD["& natural'image(r_addr) &"] "
+ & SLV32HEX(do) &" bySel="& SLV2STR(byte_sel); -- DEBUG
end if; -- wr
@@ -290,8 +290,8 @@ begin -- simulation
read(load_file, datum);
s_datum := to_signed(datum, 32);
- -- assert false report "ramINIT["& natural'image(index*4)&"]= " &
- -- SLV32HEX(std_logic_vector(s_datum)); -- DEBUG
+ assert TRUE report "ramINIT["& natural'image(index*4)&"]= " &
+ SLV32HEX(std_logic_vector(s_datum)); -- DEBUG
storage(index+3) <= std_logic_vector(s_datum(31 downto 24));
storage(index+2) <= std_logic_vector(s_datum(23 downto 16));
storage(index+1) <= std_logic_vector(s_datum(15 downto 8));
@@ -332,8 +332,8 @@ begin -- simulation
storage(index+0) <= data_inp(7 downto 0);
when others => null;
end case;
- -- assert false report "ramWR["& natural'image(index) &"] "
- -- & SLV32HEX(data) &" bySel=" & SLV2STR(byte_sel); -- DEBUG
+ assert TRUE report "ramWR["& natural'image(index) &"] "
+ & SLV32HEX(data_inp) &" bySel=" & SLV2STR(byte_sel); -- DEBUG
end if; -- is write?
if sel = '0' and wr = '1' then
@@ -372,8 +372,8 @@ begin -- simulation
d(23 downto 0) := (others => 'X');
when others => d := (others => 'X');
end case;
- -- assert false report "ramRD["& natural'image(index) &"] "
- -- & SLV32HEX(d) &" bySel="& SLV2STR(byte_sel); -- DEBUG
+ assert TRUE report "ramRD["& natural'image(index) &"] "
+ & SLV32HEX(d) &" bySel="& SLV2STR(byte_sel); -- DEBUG
elsif rising_edge(dump_ram) then
diff --git a/cMIPS/vhdl/tb_cMIPS.vhd b/cMIPS/vhdl/tb_cMIPS.vhd
index 40335d2ea2347cdecaad419d4a67d7637700cbe6..80d615b53ee8e28d9b0c71bedcdddd01cfbeec25 100644
--- a/cMIPS/vhdl/tb_cMIPS.vhd
+++ b/cMIPS/vhdl/tb_cMIPS.vhd
@@ -196,8 +196,8 @@ architecture TB of tb_cMIPS is
end component sdram_addr_decode;
component io_addr_decode is
- port (clk : in std_logic;
- rst : in std_logic;
+ port (rst : in std_logic;
+ clk : in std_logic;
cpu_d_aVal : in std_logic;
addr : in std_logic_vector;
dev_select : out std_logic_vector;
@@ -536,7 +536,7 @@ begin -- TB
-- d_busError <= '1'; -- only while testing the SDRAM
U_IO_ADDR_DEC: io_addr_decode
- port map (phi0, rst, cpu_d_aVal, d_addr, dev_select_io,
+ port map (rst, phi0, cpu_d_aVal, d_addr, dev_select_io,
io_print_sel, io_stdout_sel, io_stdin_sel,io_read_sel,
io_write_sel, io_counter_sel, io_fpu_sel, io_uart_sel,
io_sstats_sel, io_7seg_sel, io_keys_sel, io_lcd_sel,
@@ -560,7 +560,7 @@ begin -- TB
sstats_d_out when b"1010",
keybd_d_out when b"1100",
lcd_d_out when b"1101",
--- sdram_d_out when b"1110",
+ -- sdram_d_out when b"1110",
(others => 'X') when others;
U_D_CACHE: d_cache
@@ -861,8 +861,9 @@ begin
(not(in_range) and not(io_in_range)) ) else '1';
- assert true -- cpu_d_aVal = '1'
- report "e " & SLV32HEX(addr) &
+ assert TRUE -- cpu_d_aVal = '1'
+ report LF &
+ " e " & SLV32HEX(addr) &
" addr " & SLV2str(addr(15 downto 0)) & LF &
" LO_AD " & integer'image(LO_ADDR) &
" HI_AD " & integer'image(HI_ADDR) &
@@ -877,8 +878,9 @@ begin
" r_mask " & SLV32HEX(r_mask)
severity NOTE;
- assert true -- cpu_d_aVal = '1' and io_busError
- report "e " & SLV32HEX(addr) &
+ assert TRUE -- cpu_d_aVal = '1' and io_busError
+ report LF &
+ " e " & SLV32HEX(addr) &
" addr " & SLV2str(addr(15 downto 0)) & LF &
" x_hi " & SLV2STR(x_hi) &
" x_lo " & SLV2STR(x_lo) &
@@ -902,7 +904,7 @@ use work.p_wires.all;
use work.p_memory.all;
entity io_addr_decode is -- CPU side triggers access
- port (clk,rst : in std_logic; -- clk sparates back-to-back refs
+ port (rst,clk : in std_logic; -- clk sparates back-to-back refs
cpu_d_aVal : in std_logic; -- CPU data addr valid (active=0)
addr : in reg32; -- CPU address
dev_select : out reg4; -- select input to CPU
@@ -1094,7 +1096,7 @@ begin
dev_select <= b"1110" when (cpu_d_aVal = '0' and in_range) else b"0000";
- assert true -- cpu_d_aVal = '1'
+ assert TRUE -- cpu_d_aVal = '1'
report "e " & SLV32HEX(addr) &
" addr " & SLV2str(addr(15 downto 0)) & LF &
" LO_AD " & integer'image(LO_ADDR) &