From 53508f7a652466e283e57b8078136d740a74e84f Mon Sep 17 00:00:00 2001 From: Roberto Hexsel <roberto@inf.ufpr.br> Date: Wed, 8 Jul 2015 13:00:21 -0300 Subject: [PATCH] addes space between exception handlers --- cMIPS/tests/badVAddr.expected | 14 +++++------ cMIPS/tests/badVAddrMM.expected | 20 ++++++++-------- cMIPS/vhdl/core.vhd | 42 +++++++++++++++++---------------- cMIPS/vhdl/exception.vhd | 19 ++++++++------- cMIPS/vhdl/packageMemory.vhd | 10 ++++---- 5 files changed, 55 insertions(+), 50 deletions(-) diff --git a/cMIPS/tests/badVAddr.expected b/cMIPS/tests/badVAddr.expected index 6d0401a..98580e3 100644 --- a/cMIPS/tests/badVAddr.expected +++ b/cMIPS/tests/badVAddr.expected @@ -1,16 +1,16 @@ -00000418 +00000518 [ 08800010 -00000419 +00000519 ] -00000419 +00000519 [ 08800010 -0000041a +0000051a ] -0000041a +0000051a [ 08800010 -0000041b +0000051b ] -0000041b +0000051b diff --git a/cMIPS/tests/badVAddrMM.expected b/cMIPS/tests/badVAddrMM.expected index 99b05f5..fafd121 100644 --- a/cMIPS/tests/badVAddrMM.expected +++ b/cMIPS/tests/badVAddrMM.expected @@ -1,19 +1,19 @@ 00000000 [ 08800014 -00000418 +00000518 0f000001 ] 00000001 [ 08800014 -00000418 +00000518 0f000002 ] 00000002 [ 08800014 -00000418 +00000518 0f000003 ] 00000003 @@ -22,19 +22,19 @@ 00000003 [ 08800010 -00000458 +00000558 00040001 ] 00000002 [ 08800010 -00000458 +00000558 00040002 ] 00000001 [ 08800010 -00000458 +00000558 00040003 ] 00000000 @@ -43,14 +43,14 @@ 00000000 [ 08800014 -000004a0 +000005a0 0f000001 ] 00000001 00000002 [ 08800014 -000004b8 +000005b8 0f000003 ] 00000003 @@ -59,14 +59,14 @@ 00000003 [ 08800010 -000004f0 +000005f0 00040001 ] 00000002 00000002 [ 08800010 -00000510 +00000610 00040003 ] 00000001 diff --git a/cMIPS/vhdl/core.vhd b/cMIPS/vhdl/core.vhd index eb2a584..7123279 100644 --- a/cMIPS/vhdl/core.vhd +++ b/cMIPS/vhdl/core.vhd @@ -111,8 +111,10 @@ architecture rtl of core is MM_trapped: out boolean; EX_pc_abort: in boolean; MM_pc_abort: out boolean; - EX_exception: in exception_type; - MM_exception: out exception_type; + EX_ll_sc_abort: in boolean; + MM_ll_sc_abort: out boolean; + EX_exception: in exception_type; + MM_exception: out exception_type; TLB_exception: in boolean; MM_tlb_exception: out boolean; tlb_stage_MM: in boolean; @@ -147,7 +149,7 @@ architecture rtl of core is signal interrupt,MM_interrupt, exception_stall : std_logic; signal exception_taken, interrupt_taken : std_logic; signal nullify_fetch, nullify, MM_nullify : boolean; - signal addrError, MM_addrError, abort_ref : boolean; + signal addrError, MM_addrError, abort_ref, MM_ll_sc_abort : boolean; signal PC_abort, RF_PC_abort, EX_PC_abort, MM_PC_abort : boolean; signal IF_excp_type,RF_excp_type: exception_type; signal mem_excp_type, MM_mem_excp_type : exception_type; @@ -155,7 +157,7 @@ architecture rtl of core is signal trap_instr,EX_trap_instr: instr_type; signal RF_PC,EX_PC,MM_PC,WB_PC, LLaddr: reg32; signal ll_sc_bit, MM_LLbit,WB_LLbit: std_logic; - signal LL_update, LL_SC_abort, LL_SC_abort_d, LL_SC_differ: std_logic; + signal LL_update, LL_SC_abort, LL_SC_differ: std_logic; signal EX_trapped, MM_trapped, EX_ovfl,MM_ex_ovfl, trap_taken: boolean; signal int_req, MM_int_req: reg8; signal EX_nmi,MM_nmi : std_logic; @@ -1259,7 +1261,7 @@ begin -- EXECUTION --------------------------------------------- EX_FORWARDING_ALU: process (EX_a_rs,EX_a_rt,EX_a_c, EX_A,EX_B, - is_exception, LL_SC_abort_d, + is_exception, MM_ll_sc_abort, MM_a_c,MM_wreg,WB_a_c,WB_wreg, MM_is_MFC0,MM_cop0_val, MM_result,WB_C) variable i_A,i_B : reg32; @@ -1269,7 +1271,7 @@ begin if MM_is_MFC0 then i_A := MM_cop0_val; elsif MM_is_SC then - i_A := x"0000000" & b"000" & not(LL_SC_abort_d); + i_A := x"0000000" & b"000" & not( BOOL2SL(MM_ll_sc_abort) ); else i_A := MM_result; end if; @@ -1288,7 +1290,7 @@ begin if MM_is_MFC0 then i_B := MM_cop0_val; elsif MM_is_SC then - i_B := x"0000000" & b"000" & not(LL_SC_abort_d); + i_B := x"0000000" & b"000" & not( BOOL2SL(MM_ll_sc_abort) ); else i_B := MM_result; end if; @@ -1760,7 +1762,7 @@ begin addrError,MM_addrError, addrErr_stage_mm,MM_addrErr_stage_mm, mem_excp_type,MM_mem_excp_type, EX_is_delayslot,MM_is_delayslot, EX_ovfl,MM_ex_ovfl, EX_trapped,MM_trapped, - EX_PC_abort,MM_PC_abort, + EX_PC_abort,MM_PC_abort, SL2BOOL(LL_SC_abort), MM_ll_sc_abort, EX_exception,MM_exception, tlb_exception,MM_tlb_exception, tlb_stage_mm,MM_tlb_stage_mm, TLB_excp_type,MM_TLB_excp_type, EX_nmi,MM_nmi, interrupt,MM_interrupt, int_req,MM_int_req, @@ -2401,13 +2403,20 @@ begin end if; end process COP0_LLbit; - U_DELAY_LL_SC_ABORT: FFD port map (clk, rst, '1', LL_SC_abort, LL_SC_abort_d); - - MM_llbit <= ll_sc_bit and not(LL_SC_abort_d); + MM_llbit <= ll_sc_bit and not(BOOL2SL(MM_ll_sc_abort)); -- MMU-TLB =============================================================== + -- assert false -- true -- DEBUG + -- report "pgSz " & integer'image(PAGE_SZ_BITS) & + -- " va-1 "& integer'image(VABITS-1) & + -- " pg+1 "& integer'image(PAGE_SZ_BITS+1) & + -- " add " & integer'image(VABITS-1 - PAGE_SZ_BITS+1) & + -- " lef "&integer'image( PC(VABITS-1 downto PAGE_SZ_BITS+1)'left)& + -- " rig "&integer'image(PC(VABITS-1 downto PAGE_SZ_BITS+1)'right); + + -- MMU Index -- cop0_0 ------------------------- index_update <= '0' when (update = '1' and update_reg = cop0reg_Index) @@ -2484,19 +2493,12 @@ begin -- MMU Context -- pg 67 -- cop0_4 ------------ - -- assert false -- true -- DEBUG - -- report "pgSz " & integer'image(PAGE_SZ_BITS) & - -- " va-1 " & integer'image(VABITS-1) & - -- " pg+1 " & integer'image(PAGE_SZ_BITS+1) & - -- " add " & integer'image(VABITS-1 - PAGE_SZ_BITS+1) & - -- " lef " & integer'image( PC(VABITS-1 downto PAGE_SZ_BITS+1)'left )& - -- " rig " & integer'image( PC(VABITS-1 downto PAGE_SZ_BITS+1)'right ); - context_upd_pte <= '0' when (update = '1' and update_reg = cop0reg_Context) else '1'; -- - -- these registers are non-compliant so the Page Table can be at low addresses + -- these registers are non-compliant so the Page Table can be set + -- at low addresses -- -- MMU_ContextPTE: registerN generic map(9, ContextPTE_init) diff --git a/cMIPS/vhdl/exception.vhd b/cMIPS/vhdl/exception.vhd index 5d4ff46..9870612 100644 --- a/cMIPS/vhdl/exception.vhd +++ b/cMIPS/vhdl/exception.vhd @@ -138,14 +138,16 @@ entity reg_excp_EX_MM is MM_mem_excp_type: out exception_type; EX_is_delayslot: in std_logic; MM_is_delayslot: out std_logic; - EX_ovfl: in boolean; - MM_ex_ovfl: out boolean; - EX_trapped: in boolean; - MM_trapped: out boolean; - EX_pc_abort: in boolean; - MM_pc_abort: out boolean; - EX_exception: in exception_type; - MM_exception: out exception_type; + EX_ovfl: in boolean; + MM_ex_ovfl: out boolean; + EX_trapped: in boolean; + MM_trapped: out boolean; + EX_pc_abort: in boolean; + MM_pc_abort: out boolean; + EX_ll_sc_abort: in boolean; + MM_ll_sc_abort: out boolean; + EX_exception: in exception_type; + MM_exception: out exception_type; tlb_exception: in boolean; MM_tlb_exception: out boolean; tlb_stage_mm: in boolean; @@ -192,6 +194,7 @@ begin MM_ex_ovfl <= EX_ovfl ; MM_trapped <= EX_trapped ; MM_pc_abort <= EX_pc_abort ; + MM_ll_sc_abort <= EX_ll_sc_abort ; MM_exception <= EX_exception ; MM_tlb_exception <= TLB_exception ; MM_tlb_stage_MM <= tlb_stage_MM ; diff --git a/cMIPS/vhdl/packageMemory.vhd b/cMIPS/vhdl/packageMemory.vhd index 7f9d45d..ec46a24 100644 --- a/cMIPS/vhdl/packageMemory.vhd +++ b/cMIPS/vhdl/packageMemory.vhd @@ -44,15 +44,15 @@ package p_MEMORY is constant x_INST_BASE_ADDR : reg32 := x"00000000"; constant x_INST_MEM_SZ : reg32 := x"00004000"; constant x_DATA_BASE_ADDR : reg32 := x"00040000"; - constant x_DATA_MEM_SZ : reg32 := x"00040000"; + constant x_DATA_MEM_SZ : reg32 := x"00004000"; constant x_IO_BASE_ADDR : reg32 := x"0F000000"; constant x_IO_MEM_SZ : reg32 := x"00002000"; constant x_IO_ADDR_RANGE : reg32 := x"00000020"; constant x_EXCEPTION_0000 : reg32 := x"000000E0"; - constant x_EXCEPTION_0100 : reg32 := x"00000100"; - constant x_EXCEPTION_0180 : reg32 := x"00000180"; - constant x_EXCEPTION_0200 : reg32 := x"00000300"; - constant x_ENTRY_POINT : reg32 := x"00000400"; + constant x_EXCEPTION_0100 : reg32 := x"00000180"; + constant x_EXCEPTION_0180 : reg32 := x"00000280"; + constant x_EXCEPTION_0200 : reg32 := x"00000400"; + constant x_ENTRY_POINT : reg32 := x"00000500"; -- end DO NOT change these names -- constant INST_BASE_ADDR : integer := to_integer(signed(x_INST_BASE_ADDR)); -- GitLab