diff --git a/cMIPS/bin/edMemory.sh b/cMIPS/bin/edMemory.sh index da4f8d12599611ceb4dfe6b3c1e550909bf74455..ed3c4db73f2100ac5a93803407c51affaa211299 100755 --- a/cMIPS/bin/edMemory.sh +++ b/cMIPS/bin/edMemory.sh @@ -76,7 +76,7 @@ then cp "${lnk}" "${lnk}"~ for VAR in $VARIABLES ; do NEW=$(egrep -h ${VAR} "${dfn}" | sed -n -e '/reg32/s/.*x"\(.*\)".*/\1/p') - OLD=$(egrep -h ${VAR} "${lnk}" | sed -n -e 's/.* = 0x\(.*\);.*/\1/p') + OLD=$(egrep -h ${VAR} "${lnk}" | sed -n -e 's/.* = 0x\(.*\), .*/\1/p') # echo -n -e "$NEW $OLD\n" if [ -n "$OLD" ] ; then sed -i -e '/'$VAR'/s/'$OLD'/'$NEW'/' "${lnk}" diff --git a/cMIPS/include/cMIPS.ld b/cMIPS/include/cMIPS.ld index a3ee7a098937d7967b55e71a20e2ebb9d6d9a665..8c65855e98e25ed563b1724b176201df9397f35b 100644 --- a/cMIPS/include/cMIPS.ld +++ b/cMIPS/include/cMIPS.ld @@ -1,32 +1,39 @@ OUTPUT_ARCH(mips) ENTRY(_start) + +MEMORY +{ + rom (rx) : ORIGIN = 0x00000000, /* x_INST_BASE_ADDR */ + LENGTH = 0x00004000, /* x_INST_MEM_SZ */ + ram (!rx) : ORIGIN = 0x00040000, /* x_DATA_BASE_ADDR */ + LENGTH = 0x00040000 /* x_DATA_MEM_SZ */ +} + SECTIONS { - . = 0x00000000; /* x_INST_BASE_ADDR */ .text : { *(.text .text.*) _etext = . ; /* end of text constant (from Xinu) */ - } - . = 0x00040000; /* x_DATA_BASE_ADDR */ - .rodata : { *(.rodata .rodata.*) } - .rodata1 : { *(.rodata1) } - .data : + } > rom + + .rodata : { *(.rodata .rodata.*) } > ram + .rodata1 : { *(.rodata1) } > ram + .data ALIGN(0x10) : { *(.data .data.*) _edata = . ; /* end of data constant (from Xinu) */ - - } - .data1 : { *(.data1) } - .sdata : { *(.sdata .sdata.*) } - .lit8 : { *(.lit8) } - .lit4 : { *(.lit4) } - .sbss : { *(.sbss .sbss.*) *(.scommon .scommon.*) } - .bss : + } > ram + .data1 : { *(.data1) } > ram + .sdata : { *(.sdata .sdata.*) } > ram + .lit8 : { *(.lit8) } > ram + .lit4 : { *(.lit4) } > ram + .sbss : { *(.sbss .sbss.*) *(.scommon .scommon.*) } > ram + .bss ALIGN(0x10) : { *(.bss .bss.*) *(COMMON) _end = . ; /* end of image constant (from Xinu) */ - } + } > ram } diff --git a/cMIPS/include/cMIPS.s b/cMIPS/include/cMIPS.s index 70eef736364af0fccaa51af61d9c3f9470ac47cd..c21398cdfc9037fbdb5bf66ba38d7cc029dc76d9 100644 --- a/cMIPS/include/cMIPS.s +++ b/cMIPS/include/cMIPS.s @@ -1,10 +1,10 @@ # see vhdl/packageMemory.vhd for addresses .set x_INST_BASE_ADDR,0x00000000 - .set x_INST_MEM_SZ,0x00002000 + .set x_INST_MEM_SZ,0x00004000 .set x_DATA_BASE_ADDR,0x00040000 - .set x_DATA_MEM_SZ,0x00002000 + .set x_DATA_MEM_SZ,0x00004000 .set x_IO_BASE_ADDR,0x0F000000 .set x_IO_MEM_SZ,0x00002000 diff --git a/cMIPS/include/start.s b/cMIPS/include/start.s index 042e402ed8f73b3f32d53ef552d59e5c36e99f3b..253956c3b703903706b660a15442233bc3392959 100644 --- a/cMIPS/include/start.s +++ b/cMIPS/include/start.s @@ -32,7 +32,7 @@ _start: # then set another mapping onto TLB[4], to avoid replicated entries li $a0, ( (x_DATA_BASE_ADDR + 8*4096) >>12 ) - sll $a2, $a0, 12 # tag for RAM[0,1] double-page + sll $a2, $a0, 12 # tag for RAM[8,9] double-page mtc0 $a2, cop0_EntryHi li $a0, ((x_DATA_BASE_ADDR + 8*4096) >>12 ) @@ -75,8 +75,8 @@ _start: li $k0, 4 mtc0 $k0, cop0_Wired - # initialize SP: ramTop-8 - li $sp,(x_DATA_BASE_ADDR+x_DATA_MEM_SZ-8) + # initialize SP at top of RAM: ramTop - 8 + li $sp, ((x_DATA_BASE_ADDR+x_DATA_MEM_SZ) - 8) # set STATUS, cop0, hw interrupt IRQ7,IRQ6,IRQ5 enabled, user mode li $k0, 0x1000e011 @@ -122,6 +122,7 @@ _excp_0000: ## ##================================================================ ## exception vector_0100 Cache Error (hw not implemented) + ## print CAUSE and stop simulation ## .org x_EXCEPTION_0100,0 .ent _excp_0100 @@ -150,7 +151,7 @@ _excp_0100: .comm _excp_saves 16*4 # _excp_saves[0]=CAUSE, [1]=STATUS, [2]=ASID, # [8]=$ra, [9]=$a0, [10]=$a1, [11]=$a2, [12]=$a3 - + # [13]=$sp [14]=$fp [15]=$at .text .set noreorder .set noat diff --git a/cMIPS/vhdl/packageMemory.vhd b/cMIPS/vhdl/packageMemory.vhd index 5070aa9de9af788ff0d63245d83038135e8e7073..a0f54b59e792804b62eaf1f7d5e2200b49db237c 100644 --- a/cMIPS/vhdl/packageMemory.vhd +++ b/cMIPS/vhdl/packageMemory.vhd @@ -43,7 +43,7 @@ package p_MEMORY is constant x_INST_BASE_ADDR : reg32 := x"00000000"; constant x_INST_MEM_SZ : reg32 := x"00004000"; constant x_DATA_BASE_ADDR : reg32 := x"00040000"; - constant x_DATA_MEM_SZ : reg32 := x"00008000"; + constant x_DATA_MEM_SZ : reg32 := x"00004000"; constant x_IO_BASE_ADDR : reg32 := x"0F000000"; constant x_IO_MEM_SZ : reg32 := x"00002000"; constant x_IO_ADDR_RANGE : reg32 := x"00000020";