diff --git a/cMIPS/include/start.s b/cMIPS/include/start.s
index 5f2ca436d88b6b6e9bf5cdc1c520011f1d19a435..ac090a7434c3a9f7070ff0b97fdc59aa84ba016e 100644
--- a/cMIPS/include/start.s
+++ b/cMIPS/include/start.s
@@ -169,7 +169,6 @@ _excp_0000:
 	mtc0 $k1, c0_entrylo1   # EntryLo1 <- k1 = odd element
 	ehb
 	tlbwr	                # update TLB
-	mfc0 $zero, c0_cause	# clear excCode in Cause
 	eret	
 	.end _excp_0000
 
diff --git a/cMIPS/tests/badVAddr.s b/cMIPS/tests/badVAddr.s
index 81d611c22d9326376efe84fce233f817a6a0fb34..74b6d95bf7134a62b43c5f08a3fa13d25f663c64 100644
--- a/cMIPS/tests/badVAddr.s
+++ b/cMIPS/tests/badVAddr.s
@@ -62,7 +62,7 @@ excp_180:
         mfc0  $k0, c0_cause
 	sw    $k0, 0($14)       # print CAUSE
 
-	mfc0  $k0, c0_epc     # fix return address
+	mfc0  $k0, c0_epc       # fix return address
 	sw    $k0, 0($14)       # print EPC
         addiu $k1, $zero, -4    # -4 = 0xffff.fffc
         and   $k1, $k1, $k0     # fix the invalid address
diff --git a/cMIPS/tests/interr_x2.s b/cMIPS/tests/interr_x2.s
index 380b84b838fb39997d545487379e7f65b274175d..72bdfe1cb69eb43ea5bf49773b5984f5ac05a79a 100644
--- a/cMIPS/tests/interr_x2.s
+++ b/cMIPS/tests/interr_x2.s
@@ -139,7 +139,7 @@ lo_pri: lui   $k0, %hi(ext_restart)
 rf_irq:	sw    $k1, 0x20($15)	# print IRQ source
 	sw    $13, 0x20($15)
 	
-	li    $k0, 0x1000f003   # CP0active, enable COUNT irq, EXL=1
+	li    $k0, 0x1000f001   # CP0active, enable COUNT irq, EXL=0, IE=1
         mtc0  $k0, c0_status
 	eret
 	#
diff --git a/cMIPS/tests/mmu_inval.s b/cMIPS/tests/mmu_inval.s
index b9099eb536cc9ac9151e17f848d01ff1287d153b..5c43a7c53011eb80605904ed9283d72cf30bc48a 100644
--- a/cMIPS/tests/mmu_inval.s
+++ b/cMIPS/tests/mmu_inval.s
@@ -36,7 +36,7 @@
 	.globl _start,_exit
 	.ent _start
 
-	## set STATUS, cop0, no interrupts enabled
+	## set STATUS, cop0, no interrupts enabled, EXL=0
 _start:	li   $k0, 0x10000000
         mtc0 $k0, cop0_STATUS
 
diff --git a/cMIPS/tests/mmu_inval2.s b/cMIPS/tests/mmu_inval2.s
index e171c0ddde7f619ca5adb697ba2ff1af950630a8..51873837ed4e78c6b814853751c9f175b32285a1 100644
--- a/cMIPS/tests/mmu_inval2.s
+++ b/cMIPS/tests/mmu_inval2.s
@@ -36,7 +36,7 @@
 	.globl _start,_exit
 	.ent _start
 
-	## set STATUS, cop0, no interrupts enabled
+	## set STATUS, cop0, no interrupts enabled, UM=0, EXL=0
 _start:	li   $k0, 0x10000000
         mtc0 $k0, cop0_STATUS
 
diff --git a/cMIPS/tests/mmu_refill.s b/cMIPS/tests/mmu_refill.s
index 9958c118ac323f257e1aad49715a164205f0920b..207a594aefd468d2d43d1740666eafbf71258671 100644
--- a/cMIPS/tests/mmu_refill.s
+++ b/cMIPS/tests/mmu_refill.s
@@ -40,7 +40,7 @@
 	.globl _start
 	.ent _start
 
-	## set STATUS, cop0, no interrupts enabled
+	## set STATUS, cop0, no interrupts enabled, EXL=0
 _start:	li   $k0, 0x10000000
         mtc0 $k0, cop0_STATUS
 
diff --git a/cMIPS/tests/mmu_refill2.s b/cMIPS/tests/mmu_refill2.s
index 1d47ed81fa5ff71e05d55b927cf832b9937646f7..225978db541275217f6f40785d94c1b385d28560 100644
--- a/cMIPS/tests/mmu_refill2.s
+++ b/cMIPS/tests/mmu_refill2.s
@@ -21,7 +21,7 @@
 	.globl _start, _exit
 	.ent _start
 
-	## set STATUS, cop0, no interrupts enabled, kernel mode
+	## set STATUS, cop0, no interrupts enabled, UM=0, EXL=0
 _start:	li   $k0, 0x10000000
         mtc0 $k0, cop0_STATUS
 
diff --git a/cMIPS/tests/mmu_refill3.s b/cMIPS/tests/mmu_refill3.s
index 3e7f29b4a7d8371cc8eff2e52855f9046bb24118..d3fbc06ea04da4f6b5566b1c35b354fa69af2e74 100644
--- a/cMIPS/tests/mmu_refill3.s
+++ b/cMIPS/tests/mmu_refill3.s
@@ -37,7 +37,7 @@
 	.globl _start,_exit
 	.ent _start
 
-	## set STATUS, cop0, no interrupts enabled
+	## set STATUS, cop0, no interrupts enabled, UM=0, EXL=0
 _start:	li   $k0, 0x10000000
         mtc0 $k0, cop0_STATUS
 
diff --git a/cMIPS/tests/pt_walk.c b/cMIPS/tests/pt_walk.c
index fd3a2d7b238aa62841ef0c25eef180c7574fba34..42bd70518aba072e52219bb2b976cb2348fd365c 100644
--- a/cMIPS/tests/pt_walk.c
+++ b/cMIPS/tests/pt_walk.c
@@ -17,8 +17,8 @@
 
 //-----------------------------------------------------------------------
 // decide on the tests to run
-#define WALK_THE_PT  0
-#define TLB_MODIFIED 1
+#define WALK_THE_PT  1
+#define TLB_MODIFIED 0
 #define DOUBLE_FAULT 0
 
 // these will abort the simulation when the fault is detected/handled