From e21ec5162adafcced2de3abef60e7b942e7874af Mon Sep 17 00:00:00 2001
From: Roberto Hexsel <roberto@inf.ufpr.br>
Date: Fri, 22 Apr 2016 11:23:02 -0300
Subject: [PATCH] hw interrupts were connected to the wront IRQs

---
 cMIPS/include/handlers.s | 37 ++++++++++++++++++++++---------------
 cMIPS/include/start.s    |  6 +++---
 cMIPS/tests/extCounter.c |  2 +-
 cMIPS/vhdl/tb_cMIPS.vhd  |  6 ++++--
 4 files changed, 30 insertions(+), 21 deletions(-)

diff --git a/cMIPS/include/handlers.s b/cMIPS/include/handlers.s
index 01fadb9..1889009 100644
--- a/cMIPS/include/handlers.s
+++ b/cMIPS/include/handlers.s
@@ -31,7 +31,7 @@ extCounter:
 	sw    $zero, 0($k0) 	# Reset counter, remove interrupt request
 
 	#----------------------------------
-	# save additional registers
+	# if you change this handler, then save additional registers
 	# lui $k1, %hi(_counter_saves)
 	# ori $k1, $k1, %lo(_counter_saves)
 	# sw  $a0, 0*4($k1)
@@ -50,7 +50,7 @@ extCounter:
 	sw    $k1,0($k0)
 
 	#----------------------------------
-	# and then restore those same registers
+	# if you changed this handler, then restore those same registers
 	# lui $k1, %hi(_counter_saves)
 	# ori $k1, $k1, %lo(_counter_saves)
 	# lw  $a0, 0*4($k1)
@@ -206,11 +206,14 @@ cmips_delay:
 
 
 	#----------------------------------------------------------------	
-	# print a message, does not disturbs registers
-	.bss 
+	# print a message from within "the kernel"
+	#   void cmips_kmsg( $k1 )
+	# this function preserves registers other than k0,k1
+	#
+	.data 
         .align  2
-	.comm   _kmsg_saves 4*4		# area to save up to 4 registers
-	# _kmsg_saves[0]=$a0, [1]=$a1, [2]=$a2, [3]=$ra
+	.comm   _kmsg_saves 4*4		# area to save 4 registers
+	# _kmsg_saves[0]=$a0, [1]=$a1, [2]=$a2, [3]=$a3
 	#
 	.text
 	.align  2
@@ -218,8 +221,8 @@ cmips_delay:
 	.set    noat
 	.global cmips_kmsg
 	.ent    cmips_kmsg
-	.equ	stdout_addr,(x_IO_BASE_ADDR + 1*x_IO_ADDR_RANGE);
-	#  void cmips_kmsg( $k1 )
+	.equ	stdout,(x_IO_BASE_ADDR + 1*x_IO_ADDR_RANGE);
+
 cmips_kmsg:
 	lui   $k0, %hi(_kmsg_saves)
 	ori   $k0, $k0, %lo(_kmsg_saves)
@@ -232,14 +235,15 @@ cmips_kmsg:
 
 	sll   $k1, $k1, 2		# adjust index onto table
 	addu  $a1, $a1, $k1
-
-	lui   $a2, %hi(stdout_addr)
-	ori   $a2, $a2, %lo(stdout_addr)
+	lw    $a1, 0($a1)		# de-reference pointer
+	
+	lui   $a2, %hi(stdout)
+	ori   $a2, $a2, %lo(stdout)
 	
 k_for:	lbu   $a0, 0($a1)
-	sb    $a0, 0($a2)		# send it to simulator's stdout
-	bne   $a0, $zero, k_for
 	addiu $a1, $a1, 1
+	bne   $a0, $zero, k_for
+	sb    $a0, 0($a2)		# send it to simulator's stdout
 	
 	lw    $a0, 0*4($k0)
 	lw    $a1, 1*4($k0)
@@ -250,12 +254,15 @@ k_for:	lbu   $a0, 0($a1)
 
 	.equ kmsg_interr,0
 	.equ kmsg_excep,1
+
 	.data
         .align  2
-	.global _kmsg_list
 _kmsg_interr:	.asciiz "\n\tinterrupt\n\n"
-_kmsg_excep:	.asciiz "\n\texceptioninterrupt\n\n"
+_kmsg_excep:	.asciiz "\n\texception\n\n"
 
+	.global _kmsg_list
+	.data
+        .align  2	
 _kmsg_list: .word _kmsg_interr,_kmsg_excep
 
 	#----------------------------------------------------------------
diff --git a/cMIPS/include/start.s b/cMIPS/include/start.s
index 7aad3ea..f32602b 100644
--- a/cMIPS/include/start.s
+++ b/cMIPS/include/start.s
@@ -130,7 +130,7 @@ _excp_0100:
 	.set noreorder
 	.set noat
 
-	la   $k0, x_IO_BASE_ADDR
+	la   $k0, x_IO_BASE_ADDR # PANIC: SHOULD NEVER GET HERE
 	mfc0 $k1, cop0_CAUSE
 	sw   $k1, 0($k0)	# print CAUSE, flush pipe and stop simulation
 	nop
@@ -268,7 +268,7 @@ _excp_0200:
 	mfc0 $k1, cop0_STATUS
 	and  $k0, $k0, $k1         # and mask with IM bits 
 
-	srl  $k0, $k0, 11	   # keep only 3 MS bits of IP (irq7..5)
+	srl  $k0, $k0, 10	   # keep only 3 MS bits of IP (irq7..5)
 	lui  $k1, %hi(handlers_tbl) # plus displacement in j-table of 8 bytes
 	ori  $k1, $k1, %lo(handlers_tbl)
 	add  $k1, $k1, $k0
@@ -326,7 +326,7 @@ _excp_BFC0:
 	.set noreorder
 	.set noat
 
-	la   $k0, x_IO_BASE_ADDR
+	la   $k0, x_IO_BASE_ADDR # PANIC: SHOULD NEVER GET HERE
 	mfc0 $k1, cop0_CAUSE
 	sw   $k1, 0($k0)	# print CAUSE, flush pipe and stop simulation
 	nop
diff --git a/cMIPS/tests/extCounter.c b/cMIPS/tests/extCounter.c
index 75a0b62..4fc8f16 100644
--- a/cMIPS/tests/extCounter.c
+++ b/cMIPS/tests/extCounter.c
@@ -34,7 +34,7 @@ void main(void) {
 	increased = FALSE;
       }
 
-    } while ( (readCounter() & 0x3fffffff) < (newValue & 0x3ffffff) );
+    } while ( (readCounter() & 0x3fffffff) < (newValue & 0x3fffffff) );
     // are we done yet?
 
     if (increased) {
diff --git a/cMIPS/vhdl/tb_cMIPS.vhd b/cMIPS/vhdl/tb_cMIPS.vhd
index 135e1fe..40335d2 100644
--- a/cMIPS/vhdl/tb_cMIPS.vhd
+++ b/cMIPS/vhdl/tb_cMIPS.vhd
@@ -506,9 +506,11 @@ begin  -- TB
 
   not_waiting <= (inst_wait and data_wait and sdram_wait); --  and io_wait);
 
+  -- Count=Compare at IRQ7, UART at IRQ6, extCounter at IRQ5
+  -- C=C U E 0 0 0 sw1 sw0
+  irq <= '0' & uart_irq & counter_irq & b"000"; -- uart+counter interrupts
+  -- irq <= b"00" & counter_irq & b"000"; -- counter interrupts
   -- irq <= b"000000"; -- NO interrupt requests
-  irq <= uart_irq & counter_irq & b"0000"; -- uart+counter interrupts
-  -- irq <= counter_irq & b"00000"; -- counter interrupts
   nmi <= '0'; -- input port to TB
 
   U_CORE: core
-- 
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