From 605dacfc8471868cd6088b01eeb794dada5ec301 Mon Sep 17 00:00:00 2001
From: Roberto Hexsel <roberto@inf.ufpr.br>
Date: Wed, 29 Apr 2015 12:19:43 -0300
Subject: [PATCH] added FPU
---
cMIPS/vhdl/rom.vhd | 2 +-
cMIPS/vhdl/tb_cMIPS.vhd | 3 ---
2 files changed, 1 insertion(+), 4 deletions(-)
diff --git a/cMIPS/vhdl/rom.vhd b/cMIPS/vhdl/rom.vhd
index eb42b91..3814485 100644
--- a/cMIPS/vhdl/rom.vhd
+++ b/cMIPS/vhdl/rom.vhd
@@ -400,7 +400,7 @@ x"00000000" -- 3fc: nop
end init_rom;
-- Declare the ROM signal and specify a default value. Quartus II
- -- will create a memory initialization file (.mif) based on the
+ -- will create a memory initialization file (ROM.mif) based on the
-- default value.
signal rom : memory_t := init_rom;
diff --git a/cMIPS/vhdl/tb_cMIPS.vhd b/cMIPS/vhdl/tb_cMIPS.vhd
index 66e0ab3..6fe91e8 100644
--- a/cMIPS/vhdl/tb_cMIPS.vhd
+++ b/cMIPS/vhdl/tb_cMIPS.vhd
@@ -542,9 +542,6 @@ begin -- TB
lcd_d_out when b"1101",
(others => 'X') when others;
- -- U_D_MMU: mem_d_addr <= -- access Dcache with physical addresses
- -- std_logic_vector(unsigned(d_addr) - unsigned(x_DATA_BASE_ADDR));
-
U_D_CACHE: fake_d_cache -- or d_cache
-- U_D_CACHE: d_cache -- or fake_d_cache
port map (rst, clk4x,
--
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