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Commit 7e8c6aaa authored by Israel Barreto Sant'Anna's avatar Israel Barreto Sant'Anna
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Fixed access to Ud on handlerUART.s and initialized Ud variables on uart.c

parent 054d1a8c
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......@@ -106,7 +106,6 @@ UARTinterr:
sw $a0, 12($k0) # save registers $a0,$a1, others?
sw $a1, 16($k0)
sw $a2, 18($k0)
#----------------------------------
# while you are developing the complete handler,
......@@ -126,7 +125,6 @@ UARTinterr:
# sw $a1, 8($k0) # Signal new arrival
UARTret:
lw $a2, 18($k0)
lw $a1, 16($k0) # restore registers $a0,$a1, others?
lw $a0, 12($k0)
......
......@@ -5,61 +5,62 @@ RX:
andi $a0, $k1, UART_rx_irq # Is this reception?
beq $a0, $zero, TX # no, test if it's transmission
lui $a0, %hi(nrx)
ori $a0, $a0, %lo(nrx)
lw $a1, 0($a0) # Read nrx
lui $a0, %hi(Ud)
ori $a0, $a0, %lo(Ud) # $a0 <- Ud
addiu $a2, $zero, 16
slt $a2, $a1, $a2 # If nrx >= 16 the queue is full
beq $a2, $zero, END
lw $a1, 48($a0) # Read nrx
addiu $k1, $zero, 16
slt $k1, $a1, $k1 # If nrx >= 16 the queue is full
beq $k1, $zero, END
addiu $a1, $a1, 1 # Increment nrx right now so we dont need to read it again
sw $a1, 0($a0) # Save incremented nrx
sw $a1, 48($a0) # Save incremented nrx
lui $a0, %hi(rx_tl)
ori $a0, $a0, %lo(rx_tl)
lw $a1, 0($a0) # Read rx_tl
lw $a1, 20($a0) # Read rx_tl
nop
addiu $a2, $a1, 1 # Increment RX_tail
andi $a2, $a2, 15 # It's a circular queue so: (rx_tl+1)%16
sw $a2, 0($a0) # Save new rx_tl
lui $a0, %hi(HW_uart_addr)
ori $a0, $a0, %lo(HW_uart_addr)
lw $a2, 4($a0) # Read data
addiu $k1, $a1, 1 # Increment RX_tail
andi $k1, $k1, 15 # It's a circular queue so: (rx_tl+1)%16
sw $k1, 20($a0) # Save new rx_tl
lui $a0, %hi(rx_queue)
ori $a0, $a0, %lo(rx_queue)
add $a0, $a1, $a0 # Get queue tail address (before the increment)
sw $a2, 0($a0) # Put data on RX_queue tail
lui $a1, %hi(HW_uart_addr)
ori $a1, $a1, %lo(HW_uart_addr)
lw $k1, 4($a1) # Read data
nop
sw $k1, 0($a0) # Put data on RX_queue tail
#FIXME: Breaks after trying to save second character on rx_queue
la $2,x_IO_BASE_ADDR
sw $k1,0($2) # Print for debug
TX:
andi $a0, $k1, UART_tx_irq # Is this transmission?
beq $a0, $zero, END # no, end handler
lui $a0, %hi(ntx)
ori $a0, $a0, %lo(ntx)
lw $a1, 0($a0) # Read ntx
lui $a0, %hi(Ud)
ori $a0, $a0, %lo(Ud) # $a0 <- Ud
lw $a1, 52($a0) # Read ntx
addiu $a2, $zero, 16
slt $a2, $a1, $a2 # If ntx < 16 there's something on the queue
beq $a2, $zero, END
addiu $k1, $zero, 16
slt $k1, $a1, $k1 # If ntx < 16 there's something on the queue
beq $k1, $zero, END
addiu $a1, $a1, 1 # Increment ntx
sw $a1, 0($a0) # Save incremented ntx
sw $a1, 52($a0) # Save incremented ntx
lui $a0, %hi(tx_hd)
ori $a0, $a0, %lo(tx_hd)
lw $a1, 0($a0) # Read tx_hd
lw $a1, 40($a0) # Read tx_hd
nop
addiu $a2, $a1, 1 # Increment tx_hd: we've transmitted, there's space on the queue
andi $a2, $a2, 15 # It's a circular queue so: (tx_hd+1)%16
sw $a2, 0($a0) # Save tx_hd
addiu $k1, $a1, 1 # Increment tx_hd: we've transmitted, there's space on the queue
andi $k1, $k1, 15 # It's a circular queue so: (tx_hd+1)%16
sw $k1, 40($a0) # Save tx_hd
lui $a0, %hi(tx_queue)
ori $a0, $a0, %lo(tx_queue)
add $a0, $a1, $a0 # Get queue head address (before the increment)
addiu $a1, $a1, 24 # tx_hd position on tx_queue
add $a0, $a1, $a0 # tx_queue head address
lw $a1, 0($a0) # Read TX_queue head
lui $a0, %hi(HW_uart_addr)
......
......@@ -38,7 +38,7 @@ typedef struct serial {
Tdata d; // TX & RX registers at address UART + 4
} Tserial;
typedef struct{
typedef struct UARTDriver{
char rx_q[16]; // reception queue
int rx_hd; // reception queue head index
int rx_tl; // reception queue tail index
......@@ -58,6 +58,8 @@ void ioctl(int); // write lsb in control register
char getc(void); // returns char in queue, decrements nrx
int Putc(char); // inserts char in queue, decrements ntx
void initUd();
extern UARTDriver Ud;
int main(){
......@@ -65,6 +67,7 @@ int main(){
volatile int state; // tell GCC not to optimize away code
volatile Tserial *uart;
volatile Tstatus status;
volatile char c;
Tcontrol ctrl;
uart = (void *)IO_UART_ADDR; // bottom of UART address range
......@@ -75,27 +78,50 @@ int main(){
ctrl.speed = 1; // operate at 1/2 of the highest data rate
uart->cs.ctl = ctrl;
char c;
initUd();
uart->d.tx = 'a';
while((c=getc())!='\0'){
to_stdout(c);
Putc(c);
}
//print(lol);
/*while(c!='\n'){
/*to_stdout('X');
to_stdout('\n');
//print(lol);
c=getc();
}*/
while(1)
c=getc();
return 0;
}
void initUd(){
Ud.rx_hd = 0;
Ud.rx_tl = 0;
Ud.tx_hd = 0;
Ud.tx_tl = 0;
Ud.nrx = 0;
Ud.ntx = 16;
}
char getc(){
char c;
if(Ud.nrx > 0){
// print(1);
// print(Ud.nrx);
c = Ud.rx_q[Ud.rx_hd];
Ud.rx_hd = (Ud.rx_hd+1)%16;
disableInterr();
Ud.nrx--;
enableInterr();
}else{
//print(2);
c = EOF;
}
// print((int)c);
// to_stdout(c);
// to_stdout('\n');
return c;
}
......
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