From 956daa5d03ca5308d9edc3decf253485cf3f2b72 Mon Sep 17 00:00:00 2001
From: "Israel B. Sant'Anna" <ibsa14@inf.ufpr.br>
Date: Wed, 27 May 2015 11:51:56 -0300
Subject: [PATCH] Adicionado UartControl

Signed-off-by: Israel B. Sant'Anna <ibsa14@inf.ufpr.br>
---
 cMIPS/include/handlers.s  | 24 ++++++++++++------------
 cMIPS/tests/handlerUART.s |  3 +++
 cMIPS/tests/uart.c        | 17 ++++++++++++++---
 3 files changed, 29 insertions(+), 15 deletions(-)

diff --git a/cMIPS/include/handlers.s b/cMIPS/include/handlers.s
index b7ded01..6779a5b 100644
--- a/cMIPS/include/handlers.s
+++ b/cMIPS/include/handlers.s
@@ -2,7 +2,7 @@
 	.include "cMIPS.s"
 	.text
 	.set noreorder
-        .align 2
+    .align 2
 
 	.set M_StatusIEn,0x0000ff09     # STATUS.intEn=1, user mode
 	
@@ -73,17 +73,17 @@ extCounter:
 	.bss 
     .align  2
 	.set noreorder
-	.global rx_queue,rx_hd,rx_tl   # reception queue and pointers
-	.comm   rx_queue 16
-	.comm   rx_hd 4
-	.comm   rx_tl 4
-	.global tx_queue,tx_hd,tx_tl   # transmission queue and pointers
-	.comm   tx_queue 16
-	.comm   tx_hd 4
-	.comm   tx_tl 4
-	.global nrx,ntx
-	.comm   nrx 4                  # characters in RX_queue
-	.comm   ntx 4                  # spaces left in TX_queue
+	# .global rx_queue,rx_hd,rx_tl   # reception queue and pointers
+	# .comm   rx_queue 16
+	# .comm   rx_hd 4
+	# .comm   rx_tl 4
+	# .global tx_queue,tx_hd,tx_tl   # transmission queue and pointers
+	# .comm   tx_queue 16
+	# .comm   tx_hd 4
+	# .comm   tx_tl 4
+	# .global nrx,ntx
+	# .comm   nrx 4                  # characters in RX_queue
+	# .comm   ntx 4                  # spaces left in TX_queue
     .comm   _uart_buff 16*4        # up to 16 registers to be saved here
 
 	.set UART_rx_irq,0x08
diff --git a/cMIPS/tests/handlerUART.s b/cMIPS/tests/handlerUART.s
index 2b7bfa1..be96b79 100644
--- a/cMIPS/tests/handlerUART.s
+++ b/cMIPS/tests/handlerUART.s
@@ -1,5 +1,8 @@
     #--------------------------------------------------------------------------
     # interrupt handler for UART
+    #.set HW_uart_control,(x_IO_BASE_ADDR +  ? * x_IO_ADDR_RANGE)
+    .comm uart_control 56 #TODO setar endereço no MIPS p/ acessar no C
+
 RX:
     andi  $a0, $k1, UART_rx_irq # Is this reception?
     beq   $a0, $zero, TX        #   no, test if it's transmission
diff --git a/cMIPS/tests/uart.c b/cMIPS/tests/uart.c
index 3a586a6..62d9287 100644
--- a/cMIPS/tests/uart.c
+++ b/cMIPS/tests/uart.c
@@ -39,15 +39,26 @@ typedef struct serial {
   Tdata    d;            // TX & RX registers at address UART + 4
 } Tserial;
 
+typedef struct{
+  char rx_queue[16];
+  int rx_hd;
+  int rx_tl;
+  int nrx;               // characters in RX_queue
+  char tx_queue[16];
+  int tx_hd;
+  int tx_tl;
+  int ntx;               // spaces left in TX_queue
+} UartControl;
+
 int proberx(void);       // retorna nrx
 int probetx(void);       // retorna ntx
 int iostat(void);        // retorna inteiro com status no byte menos sign
 void ioctl(int);         // escreve byte menos sign no reg de controle
 char getc(void);         // retorna caractere na fila, decrementa nrx
-void putc(char);         // insere caractere na fila, decrementa ntx
+//void putc(char);         // insere caractere na fila, decrementa ntx
 int wrtc(char);          // escreve caractere diretamente em txreg
-int enableInterr(void);  // habilita interrupcoes, retorna STATUS
-int disableInterr(void); // desabilita interrupcoes, retorna STATUS
+
+extern UartControl uart_control;
 
 int main(void){
     int i;
-- 
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