diff --git a/cMIPS/tests/handlerUART.s b/cMIPS/tests/handlerUART.s
index be96b7922d802900cee5e330e1698db2d63daf48..45442b04c9c5ddd461d40897f868b191db0b59d7 100644
--- a/cMIPS/tests/handlerUART.s
+++ b/cMIPS/tests/handlerUART.s
@@ -1,7 +1,9 @@
#--------------------------------------------------------------------------
# interrupt handler for UART
- #.set HW_uart_control,(x_IO_BASE_ADDR + ? * x_IO_ADDR_RANGE)
- .comm uart_control 56 #TODO setar endereço no MIPS p/ acessar no C
+ .global uart_control
+ .comm uart_control 56 #TODO setar endereço no MIPS p/ acessar no C (?)
+ # uart_control[0]=rx_queue, [16]=rx_hd, [20]=rx_tl, [24]=nrx,
+ # [28]=tx_queue, [44]=tx_hd, [48]=tx_tl, [52]=ntx
RX:
andi $a0, $k1, UART_rx_irq # Is this reception?
diff --git a/cMIPS/tests/uart.c b/cMIPS/tests/uart.c
index 62d9287937e9b3125ba618b29c9ff2865b68ab4c..e9f94dc37a8cdf71c338cdd8489d9542d4c48f5c 100644
--- a/cMIPS/tests/uart.c
+++ b/cMIPS/tests/uart.c
@@ -1,68 +1,68 @@
#include "cMIPS.h"
-typedef struct control { // control register fields (uses only ls byte)
- int ign : 24+3, // ignore uppermost bits
- intTX : 1, // interrupt on TX buffer empty (bit 4)
- intRX : 1, // interrupt on RX buffer full (bit 3)
- speed : 3; // 4,8,16..256 tx-rx clock data rates (bits 0..2)
+typedef struct control { // control register fields (uses only ls byte)
+ int ign : 24+3, // ignore uppermost bits
+ intTX : 1, // interrupt on TX buffer empty (bit 4)
+ intRX : 1, // interrupt on RX buffer full (bit 3)
+ speed : 3; // 4,8,16..256 tx-rx clock data rates (bits 0..2)
} Tcontrol;
-typedef struct status { // status register fields (uses only ls byte)
- int s;
- // int ign : 24, // ignore uppermost bits
- // ign7 : 1, // ignored (bit 7)
- // txEmpty : 1, // TX register is empty (bit 6)
- // rxFull : 1, // octet available from RX register (bit 5)
- // int_TX_empt: 1, // interrupt pending on TX empty (bit 4)
- // int_RX_full: 1, // interrupt pending on RX full (bit 3)
- // ign2 : 1, // ignored (bit 2)
- // framing : 1, // framing error (bit 1)
- // overrun : 1; // overrun error (bit 0)
+typedef struct status { // status register fields (uses only ls byte)
+ int s;
+ // int ign : 24, // ignore uppermost bits
+ // ign7 : 1, // ignored (bit 7)
+ // txEmpty : 1, // TX register is empty (bit 6)
+ // rxFull : 1, // octet available from RX register (bit 5)
+ // int_TX_empt: 1, // interrupt pending on TX empty (bit 4)
+ // int_RX_full: 1, // interrupt pending on RX full (bit 3)
+ // ign2 : 1, // ignored (bit 2)
+ // framing : 1, // framing error (bit 1)
+ // overrun : 1; // overrun error (bit 0)
} Tstatus;
#define RXfull 0x00000020
#define TXempty 0x00000040
-typedef union ctlStat { // control + status on same address
- Tcontrol ctl; // write-only
- Tstatus stat; // read-only
+typedef union ctlStat { // control + status on same address
+ Tcontrol ctl; // write-only
+ Tstatus stat; // read-only
} TctlStat;
-typedef union data { // data registers on same address
- int tx; // write-only
- int rx; // read-only
+typedef union data { // data registers on same address
+ int tx; // write-only
+ int rx; // read-only
} Tdata;
typedef struct serial {
- TctlStat cs; // control & status at address UART + 0
- Tdata d; // TX & RX registers at address UART + 4
+ TctlStat cs; // control & status at address UART + 0
+ Tdata d; // TX & RX registers at address UART + 4
} Tserial;
typedef struct{
- char rx_queue[16];
- int rx_hd;
- int rx_tl;
- int nrx; // characters in RX_queue
- char tx_queue[16];
- int tx_hd;
- int tx_tl;
- int ntx; // spaces left in TX_queue
+ char rx_queue[16];
+ int rx_hd;
+ int rx_tl;
+ int nrx; // characters in RX_queue
+ char tx_queue[16];
+ int tx_hd;
+ int tx_tl;
+ int ntx; // spaces left in TX_queue
} UartControl;
-int proberx(void); // retorna nrx
-int probetx(void); // retorna ntx
-int iostat(void); // retorna inteiro com status no byte menos sign
-void ioctl(int); // escreve byte menos sign no reg de controle
-char getc(void); // retorna caractere na fila, decrementa nrx
-//void putc(char); // insere caractere na fila, decrementa ntx
-int wrtc(char); // escreve caractere diretamente em txreg
+int proberx(void); // retorna nrx
+int probetx(void); // retorna ntx
+int iostat(void); // retorna inteiro com status no byte menos sign
+void ioctl(int); // escreve byte menos sign no reg de controle
+char getc(void); // retorna caractere na fila, decrementa nrx
+int uart_putc(char); // insere caractere na fila, decrementa ntx
+int wrtc(char); // escreve caractere diretamente em txreg
extern UartControl uart_control;
int main(void){
int i;
- volatile int state; // tell GCC not to optimize away code
+ volatile int state; // tell GCC not to optimize away code
volatile Tserial *uart;
volatile Tstatus status;
Tcontrol ctrl;
@@ -72,8 +72,41 @@ int main(void){
ctrl.ign = 0;
ctrl.intTX = 0;
ctrl.intRX = 1;
- ctrl.speed = 1; // operate at 1/2 of the highest data rate
+ ctrl.speed = 1; // operate at 1/2 of the highest data rate
uart->cs.ctl = ctrl;
+ char c;
+ while((c=getc())!='\0')
+ uart_putc(c);
+
return 0;
+}
+
+char getc(){
+ char c;
+ if(uart_control.nrx > 0){
+ c = uart_control.rx_queue[uart_control.rx_hd];
+ uart_control.rx_hd = (uart_control.rx_hd+1)%16;
+ disableInterr();
+ uart_control.nrx--;
+ enableInterr();
+ }else{
+ c = -1;
+ }
+ return c;
+}
+
+int uart_putc(char c){
+ int sent;
+ if(uart_control.ntx > 0){
+ uart_control.tx_queue[uart_control.tx_tl] = c;
+ uart_control.tx_tl = (uart_control.tx_tl+1)%16;
+ disableInterr();
+ uart_control.ntx--;
+ enableInterr();
+ sent = 1;
+ }else{
+ sent = 0;
+ }
+ return sent;
}
\ No newline at end of file