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Commit 0e10cd71 authored by Matheus Horstmann's avatar Matheus Horstmann :horse:
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SUPER DUPER PRONTO

parent 36dc74f3
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......@@ -128,9 +128,11 @@ signal alu_int_alu : reg32;
begin
alu_outalu <= alu_int_alu;
alu_int_alu <=
alu_op1 - alu_op2 when (alu_op_alu=SUBU or alu_op_alu=BEQM) else
alu_op1 - alu_op2 when (alu_op_alu=SUBU
or alu_op_alu=BEQM) else
alu_op1 and alu_op2 when alu_op_alu=AAND else
alu_op1 or alu_op2 when alu_op_alu=OOR or alu_op_alu=ORI else
alu_op1 or alu_op2 when alu_op_alu=OOR
or alu_op_alu=ORI else
alu_op1 xor alu_op2 when alu_op_alu=XXOR else
alu_op1 nor alu_op2 when alu_op_alu=NNOR else
alu_op1 + alu_op2; --- default � a soma
......
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