TLB as a cache, no exceptions yet

cMIPS/bin/compile.sh

cMIPS/include/cMIPS.s

cMIPS/include/cMIPSio.c

cMIPS/include/start.s

cMIPS/serial.inp

cMIPS/tests/doTests.sh

cMIPS/tests/extCounterInt.c

cMIPS/tests/fib.c

cMIPS/tests/memcpy.c

cMIPS/tests/uartrx.c

cMIPS/tests/uarttx.c

cMIPS/vhdl/aux.vhd

cMIPS/vhdl/core.vhd

cMIPS/vhdl/exception.vhd

cMIPS/vhdl/instrcache.vhd

cMIPS/vhdl/io.vhd

cMIPS/vhdl/memory.vhd

cMIPS/vhdl/packageExcp.vhd

cMIPS/vhdl/packageMemory.vhd

cMIPS/vhdl/packageWires.vhd