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Commit 396c2994 authored by Strozzi's avatar Strozzi
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organize

parent f7177d35
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Pipeline #
......@@ -37,6 +37,7 @@ int Putc (char c) {
else { // Sending smthng
disableInterr();
ud.ntx--;
// STORE AND THEN INCREMENTS
Ud.tx_q[Ud.tx_tl] = c;
Ud.tx_tl = (Ud.tx_tl + 1)&0xF; // modulo 16
enableInterr();
......
......@@ -10,13 +10,14 @@
sw $a3, 8*4($k0)
sw $v0, 9*4($k0)
di
jal disableInterr #$v0 = status
nop
andi $a1, $k1, UART_rx_irq # Is this reception?
beq $a1, $zero, UARTrxinter # no, maybe transmission?
nop
andi $a1, $k1, UART_tx_irq # Is this reception?
bne $a1, $zero, UARTret # no, maybe transmission?
andi $a1, $k1, UART_tx_irq # Is this transmission?
bne $a1, $zero, UARTret # no, it was nothing
nop
lui $a2, %hi(ntx)
......@@ -30,6 +31,7 @@
addi $a1, $a1, 1
sw $a1, 0($a2) # update ntx, one more free space
# STORE AND THEN INCREMENTS
lui $a2, %hi(tx_q)
ori $a2, $a2, %lo(tx_q)
......@@ -49,11 +51,12 @@
endHU:
jal enableInterr
nop
lw $v0, 9*4($k0)
lw $a3, 8*4($k0)
lw $a2, 7*4($k0)
b UARTret
ei
lw $a2, 7*4($k0)
UARTrxinter:
#handle reception
......@@ -69,6 +72,7 @@ UARTrxinter:
lui $5, %hi(nrx)
ori $5, $5, %lo(nrx)
lw $7, 0($5)
nop
slti $6, $7, 16
beq $6, $zero, overrun
nop
......
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