getc funcionando

Signed-off-by: Jedian <jmb15@c3sl.ufpr.br>

cMIPS/tests/handlerUARTjedi2.s

@@ -27,7 +27,7 @@
     ori   $5, $5, %lo(nrx)
     lw    $7, 0($5)
     slti  $6, $7, 16
-    beq   $6, zero, overrun
+    beq   $6, $zero, overrun
     nop
     addiu $7, $7, 1
     sw    $7, 0($5)

cMIPS/tests/jedidafu.c

+#include "cMIPS.h"
+
+typedef struct UARTdriver {
+int rx_hd ; // reception queue head index
+int rx_tl ; // reception queue tail index
+char rx_q [16]; // reception queue
+int tx_hd ; // transmission queue head index
+int tx_tl ; // transmission queue tail index
+char tx_q [16]; // transmission queue
+int nrx ; // number of characters in rx_queue
+int ntx ; // number of spaces in tx_queue
+} UARTdriver ;
+extern UARTdriver Ud ;
+
+
+typedef struct control { // control register fields (uses only ls byte)
+  int ign   : 24,        // ignore uppermost bits
+    rts     : 1,         // Request to Send output (bit 7)
+    ign2    : 2,         // bits 6,5 ignored
+    intTX   : 1,         // interrupt on TX buffer empty (bit 4)
+    intRX   : 1,         // interrupt on RX buffer full (bit 3)
+    speed   : 3;         // 4,8,16..256 tx-rx clock data rates  (bits 0..2)
+} Tcontrol;
+
+typedef struct status {  // status register fields (uses only ls byte)
+  unsigned int ign : 24, // ignore uppermost 3 bytes
+  cts     : 1,           // Clear To Send input=1 (bit 7)
+  txEmpty : 1,           // TX register is empty (bit 6)
+  rxFull  : 1,           // octet available from RX register (bit 5)
+  int_TX_empt: 1,        // interrupt pending on TX empty (bit 4)
+  int_RX_full: 1,        // interrupt pending on RX full (bit 3)
+  ign1    : 1,           // ignored (bit 2)
+  framing : 1,           // framing error (bit 1)
+  overun  : 1;           // overun error (bit 0)
+} Tstatus;
+
+
+typedef union ctlStat { // control + status on same address
+  Tcontrol  ctl;        // write-only
+  Tstatus   stat;       // read-only
+} TctlStat;
+
+typedef union data {    // data registers on same address
+  int tx;               // write-only
+  int rx;               // read-only
+} Tdata;
+
+typedef struct serial {
+  TctlStat cs;
+  Tdata    d;
+} Tserial;
+
+char Getc () {
+    char c ;
+    if ( Ud.nrx > 0) {
+        disableInterr();
+        // exclui handler enquanto altera Ud
+        Ud.nrx -= 1;
+        c = Ud.rx_q [ Ud.rx_hd ];
+        Ud.rx_hd = (Ud.rx_hd + 1) & 15; // modulo 16
+        enableInterr();
+    } else {
+        c = 0;
+    }
+    return c ;
+}
+
+
+int main(void) { // receive a string through the UART serial interface
+  int i, j;
+  volatile int state;
+  volatile Tserial *uart;  // tell GCC not to optimize away code
+  volatile Tstatus status;
+  Tcontrol ctrl;
+
+  uart = (void *)IO_UART_ADDR; // bottom of UART address range
+
+  ctrl.ign   = 0;
+  ctrl.rts   = 0;   // make RTS=0 to hold RemoteUnit
+  ctrl.ign2  = 0;
+  ctrl.intTX = 0;
+  ctrl.intRX = 1;
+  ctrl.speed = 1;   // operate at the second highest data rate
+  uart->cs.ctl = ctrl;
+
+  i = -1;
+
+  ctrl.ign   = 0;
+  ctrl.rts   = 1;   // make RTS=1 to activate RemoteUnit
+  ctrl.ign2  = 0;
+  ctrl.intTX = 0;
+  ctrl.intRX = 1;
+  ctrl.speed = 1;   // operate at the second highest data rate
+  uart->cs.ctl = ctrl;
+
+  do {
+    state = i = i+1;
+    while(Ud.rx_tl == Ud.rx_hd){ to_stdout('d'); state = 1- state;}
+
+    j = -1;
+    to_stdout('=');
+    do{
+        j = j + 1;
+        //to_stdout(Ud.rx_q[j]);
+        to_stdout(Getc());
+        if(Ud.rx_q[j] == '\n')
+            print(Ud.nrx); //nada ou string completa
+    }while(j<15);
+    to_stdout( '-');
+
+  } while (i<5);
+
+  return(state+i);
+
+}