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Commit b4baeb66 authored by Roberto Hexsel's avatar Roberto Hexsel
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now reads from stdin, cMIPS.{h,c}

parent 23eb0ec4
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#define x_INST_BASE_ADDR 0x00000000 #define x_INST_BASE_ADDR 0x00000000
#define x_DATA_BASE_ADDR 0x00020000 #define x_DATA_BASE_ADDR 0x00010000
#define x_IO_BASE_ADDR 0x0F000000 #define x_IO_BASE_ADDR 0x0F000000
#define x_IO_MEM_SZ 0x00002000 #define x_IO_MEM_SZ 0x00002000
#define x_IO_ADDR_RANGE 0x00000020 #define x_IO_ADDR_RANGE 0x00000020
...@@ -24,7 +24,7 @@ ...@@ -24,7 +24,7 @@
extern void exit(int); extern void exit(int);
extern void print(int); extern void print(int);
extern void to_stdout(char c); extern void to_stdout(char c);
extern int from_stdin(char *); extern int from_stdin(void);
extern void writeInt(int); extern void writeInt(int);
extern void writeClose(void); extern void writeClose(void);
......
...@@ -3,7 +3,7 @@ ...@@ -3,7 +3,7 @@
.set x_INST_BASE_ADDR,0x00000000 .set x_INST_BASE_ADDR,0x00000000
.set x_INST_MEM_SZ,0x00004000 .set x_INST_MEM_SZ,0x00004000
.set x_DATA_BASE_ADDR,0x00020000 .set x_DATA_BASE_ADDR,0x00010000
.set x_DATA_MEM_SZ,0x00008000 .set x_DATA_MEM_SZ,0x00008000
.set x_IO_BASE_ADDR,0x0F000000 .set x_IO_BASE_ADDR,0x0F000000
......
...@@ -16,11 +16,12 @@ ...@@ -16,11 +16,12 @@
//======================================================================= //=======================================================================
// simulator's STD_INPUT and STD_OUTPUT // simulator's STD_INPUT and STD_OUTPUT
//======================================================================= //=======================================================================
// write an integer (hex) to VHDL simulator's standard output // read a character from VHDL simulator's standard input
void print(int n) { int from_stdin(void) {
int *IO = (int *)IO_PRINT_ADDR; int *IO = (void *)IO_STDIN_ADDR;
*IO = n; // gets line line only after receiving a '\n' (line-feed, 0x0a)
return( *IO );
} }
// write a character to VHDL simulator's standard output // write a character to VHDL simulator's standard output
...@@ -31,21 +32,12 @@ void to_stdout(char c) { ...@@ -31,21 +32,12 @@ void to_stdout(char c) {
*IO = (unsigned char)c; *IO = (unsigned char)c;
} }
// read a character from VHDL simulator's standard input // write an integer (hex) to VHDL simulator's standard output
// return value = 1 if EnoOfFile, 0 otherwise void print(int n) {
// character read is stored at address provided in argument int *IO = (int *)IO_PRINT_ADDR;
int from_stdin(char *c) {
int *IO = (int *)IO_STDIN_ADDR;
int status, value;
value = *IO;
status = *(IO + 1);
if (status == 0) { *IO = n;
*c = (unsigned char)value;
} }
return status;
}; //--------------------------------------------------------------------
//======================================================================= //=======================================================================
......
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