.gitignore

+cMIPS/vhdl/*.o
+cMIPS/vhdl/*.cf
+cMIPS/vhdl/.last_import
+cMIPS/tb_cmips
+cMIPS/include/*.o
+cMIPS/include/*~
+cMIPS/include/cMIPSio.s

cMIPS/include/main.c

+#include "cMIPS.h"
+#include "vetorFib.h"
+
+#define MAXPOW 7
+
+typedef struct UARTdriver {
+int rx_hd ; // reception queue head index
+int rx_tl ; // reception queue tail index
+char rx_q [16]; // reception queue
+int tx_hd ; // transmission queue head index
+int tx_tl ; // transmission queue tail index
+char tx_q [16]; // transmission queue
+int nrx ; // number of characters in rx_queue
+int ntx ; // number of spaces in tx_queue
+} UARTdriver ;
+extern UARTdriver Ud ;
+
+int Strlen(char *c)
+{
+    int i= 0;
+    while(c[i++]-10);
+    return i-1;
+}
+
+int pow16(int ex)
+{
+    int i, ret=1;
+    for (i= 0; i< ex/2; i++)
+        ret*=16;
+    ret *= ret;
+    return (ex%2?ret*16:ret);
+}
+
+int hex2int(char *hex)
+{
+    int s= Strlen(hex), i, ans= 0;
+    for (i= 0; i< s; i++) {
+        hex[i]-= 48;
+        if (hex[i] > 9)
+            hex[i] -= 7;
+        if (hex[i] > 15)
+            hex[i] -= 32;
+        ans += hex[i] * pow16(s-(i+1));
+    }
+    return ans;
+}
+
+int int2hex(char *c, int i)
+{
+    int j= 0, val;
+    int p;
+    p = pow16(MAXPOW);
+    while (p > 0) {
+        val= 0;
+        if (i/p) {
+            val= i/p;
+            i%= p;
+        }
+        if ((val < 10) && (j || val)) { // impede que '0' sejam escritos à esquerda
+            c[j++] = val+'0';
+        }
+        else if (val > 9)
+            c[j++] = 'a'+ (val-10);
+        p/=16;
+    }
+    c[j] = 10;
+    return j-1;
+}
+
+int main()
+{
+    char n[16], f[16], c;
+    int fib, j, s;
+    while (1) {
+        j= 0;
+        while ((n[j++]= getFila()) != '\n'); 
+        n[j] = '\n'
+        if (n[0] == 10)         // critério de fim de transmissão
+            break;
+        fib= hex2int(n);
+        if (fib < BUF_SZ) {
+            fib = buf[fib];
+            s= int2hex(f, fib); //retorna strlen de f
+            for (j= 0; j< s; j++)
+                putc(f[j]);
+        } else {
+            to_stdout('v');
+            to_stdout('a');
+            to_stdout('l');
+            to_stdout('o');
+            to_stdout('r');
+            to_stdout(' ');
+            to_stdout('m');
+            to_stdout('u');
+            to_stdout('i');
+            to_stdout('t');
+            to_stdout('o');
+            to_stdout(' ');
+            to_stdout('g');
+            to_stdout('r');
+            to_stdout('a');
+            to_stdout('n');
+            to_stdout('d');
+            to_stdout('e');
+            to_stdout('\n');
+        }
+    }
+    // sleep??
+    return 0;
+}

cMIPS/include/mainjedi.c

+#include "cMIPS.h"
+
+typedef struct control { // control register fields (uses only ls byte)
+  int ign   : 24,        // ignore uppermost bits
+    rts     : 1,         // Request to Send output (bit 7)
+    ign2    : 2,         // bits 6,5 ignored
+    intTX   : 1,         // interrupt on TX buffer empty (bit 4)
+    intRX   : 1,         // interrupt on RX buffer full (bit 3)
+    speed   : 3;         // 4,8,16..256 tx-rx clock data rates  (bits 0..2)
+} Tcontrol;
+
+typedef struct status { // status register fields (uses only ls byte)
+  int ign : 24,       // ignore uppermost bits
+  ign7    : 1,        // ignored (bit 7)
+  txEmpty : 1,        // TX register is empty (bit 6)
+  rxFull  : 1,        // octet available from RX register (bit 5)
+  int_TX_empt: 1,     // interrupt pending on TX empty (bit 4)
+  int_RX_full: 1,     // interrupt pending on RX full (bit 3)
+  ign2    : 1,        // ignored (bit 2)
+  framing : 1,        // framing error (bit 1)
+  overun  : 1;        // overun error (bit 0)
+} Tstatus;
+
+
+typedef union ctlStat { // control + status on same address
+  Tcontrol  ctl;        // write-only
+  Tstatus   stat;       // read-only
+} TctlStat;
+
+typedef union data {    // data registers on same address
+  int tx;               // write-only
+  int rx;               // read-only
+} Tdata;
+
+typedef struct serial {
+  TctlStat cs;          // @ (int *)IO_UART_ADDR
+}
+
+typedef struct serial {
+  TctlStat cs;          // @ (int *)IO_UART_ADDR
+  Tdata    d;           // @ (int *)(IO_UART_ADDR+1)
+} Tserial;
+
+
+extern int _uart_buff[16]; // declared in include/handlers.s
+
+int main(void) { // receive a string through the UART serial interface
+  volatile Tserial *uart;  // tell GCC not to optimize away code
+  Tcontrol ctrl;
+  volatile int *bfr = &(_uart_buff[0]);
+  volatile char c;
+
+  uart = (void *)IO_UART_ADDR; // bottom of UART address range
+
+  ctrl.ign   = 0;
+  ctrl.rts   = 0;  // make RTS=0 to hold remote unit
+  ctrl.intTX = 0;
+  ctrl.intRX = 0;
+  ctrl.speed = 2;  // operate at 1/4 of the highest data rate
+  uart->cs.ctl = ctrl; // initizlize UART
+
+  // handler sets flag=bfr[3] to 1 after new character is received;
+  // this program resets the flag on fetching a new character from buffer
+  bfr[3] = 0;      //   reset flag  
+
+  ctrl.ign   = 0;
+  ctrl.rts   = 1;  // make RTS=1 so RemoteUnit starts its transmission
+  ctrl.intTX = 0;
+  ctrl.intRX = 1;  // do generate interrupts on RXbuffer full
+  ctrl.speed = 2;  // operate at 1/4 of the highest data rate
+  uart->cs.ctl = ctrl;
+
+  do {
+    while ( (c = (char)bfr[3]) == 0 )
+      {};                 // nothing new
+    c = (char)bfr[2];     // get new character
+    bfr[3] = 0;           //   and reset flag
+    to_stdout( (int)c );
+  } while (c != '\0');    // end of string?
+
+  return c;
+
+}

cMIPS/include/vetorFib.h

+#define BUF_SZ 45
+
+int buf[BUF_SZ] = {
+1,1,2,3,5,8,13,21,
+34,55,89,144,233,377,610,987,
+1597,2584,4181,6765,10946,17711,28657,46368,
+75025,121393,196418,317811,514229,832040,1346269,2178309,
+3524578,5702887,9227465,14930352,24157817,39088169,63245986,102334155,
+165580141,267914296,433494437,701408733
+};
+

cMIPS/tests/handlerUARTjedi.s

+#UARTinterr:
+    andi  $a1, $k1, UART_rx_irq # Is this reception?
+    beq   $a1, $zero, UARTinterr2   #   no, maybe transmission?
+    nop
+
+    #handle reception
+    lw    $a1, 4($a0)           # Read data from device
+    nop                         #   and store it to UART's buffer
+    sw    $a1, 2*4($k0)         #   and return from interrupt
+    addiu $a1, $zero, 1
+    sw    $a1, 3*4($k0)         # Signal new arrival
+                                # Jedian: when a new char is on the UART's buffer, i have to enqueue it and update nrx
+
+UARTinterr2:
+    andi  $a1, $k1, UART_tx_irq # Is this transmission?
+    beq   $a1, $zero, UARTret   # no, ignore it and return
+    nop
+
+    #handle transmission
+    # ... TODO
+
+
+#UARTret: